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#Created by Constraints Editor (xc6slx25-ftg256-3) - 2012/11/07
#NET "clk_1mhz" TNM_NET = "clk_1mhz";
#TIMESPEC TS_clk_1mhz = PERIOD "clk_1mhz" 1 us HIGH 50 %;
NET "clk_12mhz" TNM_NET = "clk_12mhz";
TIMESPEC TS_clk_12mhz = PERIOD "clk_12mhz" 83.3333 ns HIGH 50 % INPUT_JITTER 0.01 ns;
NET "sclk" TNM_NET = "sclk";
TIMESPEC TS_sclk = PERIOD "sclk" 125 ns LOW 50 %;
NET "clk_12mhz" LOC = A9;
NET "pcm_out[0]" LOC = B15; #14
NET "pcm_out[1]" LOC = B16; #13
NET "pcm_out[2]" LOC = C15; #12
NET "pcm_out[3]" LOC = C16; #11
NET "sclk" LOC = J16; #7
NET "miso" LOC = J14; #8
NET "mosi" LOC = F15; #9
NET "ssel" LOC = F16; #10