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arm64: dts: sun50i: h6: Add HDMI pipeline
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This commit adds all entries needed for HDMI to function properly.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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jernejsk committed Mar 28, 2018
1 parent 4aac1ac commit 5a92714
Showing 1 changed file with 139 additions and 0 deletions.
139 changes: 139 additions & 0 deletions arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/clock/sun50i-h6-r-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-tcon-top.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>

/ {
interrupt-parent = <&gic>;
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};

de: display-engine {
compatible = "allwinner,sun50i-h6-display-engine";
allwinner,pipelines = <&mixer0>;
status = "disabled";
};

soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;

display_clocks: clock@1000000 {
compatible = "allwinner,sun50i-h6-de3-clk";
reg = <0x01000000 0x100000>;
clocks = <&ccu CLK_DE>,
<&ccu CLK_BUS_DE>;
clock-names = "mod",
"bus";
resets = <&ccu RST_BUS_DE>;
#clock-cells = <1>;
#reset-cells = <1>;
};

mixer0: mixer@1100000 {
compatible = "allwinner,sun50i-h6-de3-mixer-0";
reg = <0x01100000 0x100000>;
clocks = <&display_clocks CLK_BUS_MIXER0>,
<&display_clocks CLK_MIXER0>;
clock-names = "bus",
"mod";
resets = <&display_clocks RST_MIXER0>;

ports {
#address-cells = <1>;
#size-cells = <0>;

mixer0_out: port@1 {
reg = <1>;

mixer0_out_tcon0: endpoint {
remote-endpoint = <&tcon0_in_mixer0>;
};
};
};
};

syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h6-system-controller",
"syscon";
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drive-strength = <40>;
};

hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
function = "hdmi";
};

mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
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status = "disabled";
};

hdmi: hdmi@6000000 {
compatible = "allwinner,sun50i-h6-dw-hdmi";
reg = <0x06000000 0x10000>;
reg-io-width = <1>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>;
clock-names = "iahb", "isfr", "tmds", "cec";
resets = <&ccu RST_BUS_HDMI_SUB>;
reset-names = "ctrl";
phys = <&hdmi_phy>;
phy-names = "hdmi-phy";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_pins>;
status = "disabled";

ports {
#address-cells = <1>;
#size-cells = <0>;

hdmi_in: port@0 {
reg = <0>;

hdmi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_hdmi>;
};
};

hdmi_out: port@1 {
reg = <1>;
};
};
};

hdmi_phy: hdmi-phy@6010000 {
compatible = "allwinner,sun50i-h6-hdmi-phy";
reg = <0x06010000 0x10000>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_HDMI>;
reset-names = "phy";
#phy-cells = <0>;
};

tcon_top: tcon-top@6510000 {
compatible = "allwinner,sun8i-r40-tcon-top";
reg = <0x06510000 0x1000>;
clocks = <&ccu CLK_BUS_TCON_TOP>;
clock-names = "bus";
resets = <&ccu RST_BUS_TCON_TOP>;
reset-names = "rst";
#clock-cells = <1>;
};

tcon0: lcd-controller@6515000 {
compatible = "allwinner,sun50i-h6-tcon-tv";
reg = <0x06515000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_TCON_TV0>, <&ccu CLK_TCON_TV0>,
<&tcon_top CLK_BUS_TCON_TOP_TV0>;
clock-names = "ahb", "tcon-ch1", "tcon-top";
resets = <&ccu RST_BUS_TCON_TV0>;
reset-names = "lcd";
allwinner,tcon-top = <&tcon_top>;

ports {
#address-cells = <1>;
#size-cells = <0>;

tcon0_in: port@0 {
reg = <0>;

tcon0_in_mixer0: endpoint {
remote-endpoint = <&mixer0_out_tcon0>;
};
};

tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;

tcon0_out_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_in_tcon0>;
};
};
};
};

r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;
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