Optimal Low-Latency Implementation of Bitsliced Cipher for RISC Processors

This repository contains the source code for the paper "Optimal Low-Latency Implementation of Bitsliced Cipher for RISC Processors"

Contents

• sbox-bgc: This is a novel encoding method optimized for the Bit-slice Gate Complexity (BGC) model. It is primarily used for optimizing the S-box.
• ARM-M4: This refers to the implementation of the encryption algorithm specifically designed for the ARM Cortex-M4 processor.
• RISC-V: This refers to the implementation of the encryption algorithm specifically designed for the RISC-V processor.