Skip to content
This repository has been archived by the owner on Apr 22, 2023. It is now read-only.

Commit

Permalink
Upgrade V8 to 2.2.19
Browse files Browse the repository at this point in the history
  • Loading branch information
ry committed Jun 24, 2010
1 parent ba792ea commit 2c0d91b
Show file tree
Hide file tree
Showing 72 changed files with 1,608 additions and 798 deletions.
16 changes: 16 additions & 0 deletions deps/v8/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,19 @@
2010-06-23: Version 2.2.19

Fix bug that causes the build to break when profillingsupport=off
(issue 738).

Added expose-externalize-string flag for testing extensions.

Resolve linker issues with using V8 as a DLL causing a number of
problems with unresolved symbols.

Fix build failure for cctests when ENABLE_DEBUGGER_SUPPORT is not
defined.

Performance improvements on all platforms.


2010-06-16: Version 2.2.18

Added API functions to retrieve information on indexed properties
Expand Down
4 changes: 3 additions & 1 deletion deps/v8/include/v8-profiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -196,7 +196,9 @@ class V8EXPORT HeapGraphEdge {
enum Type {
CONTEXT_VARIABLE = 0, // A variable from a function context.
ELEMENT = 1, // An element of an array.
PROPERTY = 2 // A named object property.
PROPERTY = 2, // A named object property.
INTERNAL = 3 // A link that can't be accessed from JS,
// thus, its name isn't a real property name.
};

/** Returns edge type (see HeapGraphEdge::Type). */
Expand Down
8 changes: 3 additions & 5 deletions deps/v8/include/v8.h
Original file line number Diff line number Diff line change
Expand Up @@ -3211,11 +3211,9 @@ class Internals {
static const int kFullStringRepresentationMask = 0x07;
static const int kExternalTwoByteRepresentationTag = 0x02;

// These constants are compiler dependent so their values must be
// defined within the implementation.
V8EXPORT static int kJSObjectType;
V8EXPORT static int kFirstNonstringType;
V8EXPORT static int kProxyType;
static const int kJSObjectType = 0x9f;
static const int kFirstNonstringType = 0x80;
static const int kProxyType = 0x85;

static inline bool HasHeapObjectTag(internal::Object* value) {
return ((reinterpret_cast<intptr_t>(value) & kHeapObjectTagMask) ==
Expand Down
4 changes: 1 addition & 3 deletions deps/v8/src/api.cc
Original file line number Diff line number Diff line change
Expand Up @@ -106,9 +106,6 @@ static i::HandleScopeImplementer thread_local;


static FatalErrorCallback exception_behavior = NULL;
int i::Internals::kJSObjectType = JS_OBJECT_TYPE;
int i::Internals::kFirstNonstringType = FIRST_NONSTRING_TYPE;
int i::Internals::kProxyType = PROXY_TYPE;

static void DefaultFatalErrorHandler(const char* location,
const char* message) {
Expand Down Expand Up @@ -4460,6 +4457,7 @@ Handle<Value> HeapGraphEdge::GetName() const {
reinterpret_cast<const i::HeapGraphEdge*>(this);
switch (edge->type()) {
case i::HeapGraphEdge::CONTEXT_VARIABLE:
case i::HeapGraphEdge::INTERNAL:
case i::HeapGraphEdge::PROPERTY:
return Handle<String>(ToApi<String>(i::Factory::LookupAsciiSymbol(
edge->name())));
Expand Down
5 changes: 0 additions & 5 deletions deps/v8/src/arm/assembler-arm-inl.h
Original file line number Diff line number Diff line change
Expand Up @@ -45,11 +45,6 @@
namespace v8 {
namespace internal {

Condition NegateCondition(Condition cc) {
ASSERT(cc != al);
return static_cast<Condition>(cc ^ ne);
}


void RelocInfo::apply(intptr_t delta) {
if (RelocInfo::IsInternalReference(rmode_)) {
Expand Down
66 changes: 59 additions & 7 deletions deps/v8/src/arm/assembler-arm.cc
Original file line number Diff line number Diff line change
Expand Up @@ -282,6 +282,11 @@ const Instr kBlxRegPattern =
const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
const Instr kMovMvnPattern = 0xd * B21;
const Instr kMovMvnFlip = B22;
const Instr kMovLeaveCCMask = 0xdff * B16;
const Instr kMovLeaveCCPattern = 0x1a0 * B16;
const Instr kMovwMask = 0xff * B20;
const Instr kMovwPattern = 0x30 * B20;
const Instr kMovwLeaveCCFlip = 0x5 * B21;
const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
const Instr kCmpCmnPattern = 0x15 * B20;
const Instr kCmpCmnFlip = B21;
Expand Down Expand Up @@ -389,6 +394,12 @@ void Assembler::Align(int m) {
}


void Assembler::CodeTargetAlign() {
// Preferred alignment of jump targets on some ARM chips.
Align(8);
}


bool Assembler::IsNop(Instr instr, int type) {
// Check for mov rx, rx.
ASSERT(0 <= type && type <= 14); // mov pc, pc is not a nop.
Expand Down Expand Up @@ -640,6 +651,12 @@ void Assembler::next(Label* L) {
}


static Instr EncodeMovwImmediate(uint32_t immediate) {
ASSERT(immediate < 0x10000);
return ((immediate & 0xf000) << 4) | (immediate & 0xfff);
}


// Low-level code emission routines depending on the addressing mode.
// If this returns true then you have to use the rotate_imm and immed_8
// that it returns, because it may have already changed the instruction
Expand All @@ -664,6 +681,15 @@ static bool fits_shifter(uint32_t imm32,
if (fits_shifter(~imm32, rotate_imm, immed_8, NULL)) {
*instr ^= kMovMvnFlip;
return true;
} else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
if (CpuFeatures::IsSupported(ARMv7)) {
if (imm32 < 0x10000) {
*instr ^= kMovwLeaveCCFlip;
*instr |= EncodeMovwImmediate(imm32);
*rotate_imm = *immed_8 = 0; // Not used for movw.
return true;
}
}
}
} else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
if (fits_shifter(-imm32, rotate_imm, immed_8, NULL)) {
Expand Down Expand Up @@ -695,7 +721,7 @@ static bool fits_shifter(uint32_t imm32,
// if they can be encoded in the ARM's 12 bits of immediate-offset instruction
// space. There is no guarantee that the relocated location can be similarly
// encoded.
static bool MustUseIp(RelocInfo::Mode rmode) {
static bool MustUseConstantPool(RelocInfo::Mode rmode) {
if (rmode == RelocInfo::EXTERNAL_REFERENCE) {
#ifdef DEBUG
if (!Serializer::enabled()) {
Expand All @@ -712,7 +738,7 @@ static bool MustUseIp(RelocInfo::Mode rmode) {

bool Operand::is_single_instruction() const {
if (rm_.is_valid()) return true;
if (MustUseIp(rmode_)) return false;
if (MustUseConstantPool(rmode_)) return false;
uint32_t dummy1, dummy2;
return fits_shifter(imm32_, &dummy1, &dummy2, NULL);
}
Expand All @@ -728,19 +754,34 @@ void Assembler::addrmod1(Instr instr,
// Immediate.
uint32_t rotate_imm;
uint32_t immed_8;
if (MustUseIp(x.rmode_) ||
if (MustUseConstantPool(x.rmode_) ||
!fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
// The immediate operand cannot be encoded as a shifter operand, so load
// it first to register ip and change the original instruction to use ip.
// However, if the original instruction is a 'mov rd, x' (not setting the
// condition code), then replace it with a 'ldr rd, [pc]'.
RecordRelocInfo(x.rmode_, x.imm32_);
CHECK(!rn.is(ip)); // rn should never be ip, or will be trashed
Condition cond = static_cast<Condition>(instr & CondMask);
if ((instr & ~CondMask) == 13*B21) { // mov, S not set
ldr(rd, MemOperand(pc, 0), cond);
if (MustUseConstantPool(x.rmode_) ||
!CpuFeatures::IsSupported(ARMv7)) {
RecordRelocInfo(x.rmode_, x.imm32_);
ldr(rd, MemOperand(pc, 0), cond);
} else {
// Will probably use movw, will certainly not use constant pool.
mov(rd, Operand(x.imm32_ & 0xffff), LeaveCC, cond);
movt(rd, static_cast<uint32_t>(x.imm32_) >> 16, cond);
}
} else {
ldr(ip, MemOperand(pc, 0), cond);
// If this is not a mov or mvn instruction we may still be able to avoid
// a constant pool entry by using mvn or movw.
if (!MustUseConstantPool(x.rmode_) &&
(instr & kMovMvnMask) != kMovMvnPattern) {
mov(ip, x, LeaveCC, cond);
} else {
RecordRelocInfo(x.rmode_, x.imm32_);
ldr(ip, MemOperand(pc, 0), cond);
}
addrmod1(instr, rn, rd, Operand(ip));
}
return;
Expand Down Expand Up @@ -1051,6 +1092,17 @@ void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) {
}


void Assembler::movw(Register reg, uint32_t immediate, Condition cond) {
ASSERT(immediate < 0x10000);
mov(reg, Operand(immediate), LeaveCC, cond);
}


void Assembler::movt(Register reg, uint32_t immediate, Condition cond) {
emit(cond | 0x34*B20 | reg.code()*B12 | EncodeMovwImmediate(immediate));
}


void Assembler::bic(Register dst, Register src1, const Operand& src2,
SBit s, Condition cond) {
addrmod1(cond | 14*B21 | s, src1, dst, src2);
Expand Down Expand Up @@ -1231,7 +1283,7 @@ void Assembler::msr(SRegisterFieldMask fields, const Operand& src,
// Immediate.
uint32_t rotate_imm;
uint32_t immed_8;
if (MustUseIp(src.rmode_) ||
if (MustUseConstantPool(src.rmode_) ||
!fits_shifter(src.imm32_, &rotate_imm, &immed_8, NULL)) {
// Immediate operand cannot be encoded, load it first to register ip.
RecordRelocInfo(src.rmode_, src.imm32_);
Expand Down
20 changes: 19 additions & 1 deletion deps/v8/src/arm/assembler-arm.h
Original file line number Diff line number Diff line change
Expand Up @@ -279,7 +279,10 @@ enum Condition {


// Returns the equivalent of !cc.
INLINE(Condition NegateCondition(Condition cc));
inline Condition NegateCondition(Condition cc) {
ASSERT(cc != al);
return static_cast<Condition>(cc ^ ne);
}


// Corresponds to transposing the operands of a comparison.
Expand Down Expand Up @@ -545,6 +548,12 @@ extern const Instr kMovMvnMask;
extern const Instr kMovMvnPattern;
extern const Instr kMovMvnFlip;

extern const Instr kMovLeaveCCMask;
extern const Instr kMovLeaveCCPattern;
extern const Instr kMovwMask;
extern const Instr kMovwPattern;
extern const Instr kMovwLeaveCCFlip;

extern const Instr kCmpCmnMask;
extern const Instr kCmpCmnPattern;
extern const Instr kCmpCmnFlip;
Expand Down Expand Up @@ -694,6 +703,8 @@ class Assembler : public Malloced {
// possible to align the pc offset to a multiple
// of m. m must be a power of 2 (>= 4).
void Align(int m);
// Aligns code to something that's optimal for a jump target for the platform.
void CodeTargetAlign();

// Branch instructions
void b(int branch_offset, Condition cond = al);
Expand Down Expand Up @@ -772,6 +783,13 @@ class Assembler : public Malloced {
mov(dst, Operand(src), s, cond);
}

// ARMv7 instructions for loading a 32 bit immediate in two instructions.
// This may actually emit a different mov instruction, but on an ARMv7 it
// is guaranteed to only emit one instruction.
void movw(Register reg, uint32_t immediate, Condition cond = al);
// The constant for movt should be in the range 0-0xffff.
void movt(Register reg, uint32_t immediate, Condition cond = al);

void bic(Register dst, Register src1, const Operand& src2,
SBit s = LeaveCC, Condition cond = al);

Expand Down
Loading

0 comments on commit 2c0d91b

Please sign in to comment.