GitHub - k1minseok/Verilog_UART_0520: Implement UART Receiver, Transmitter

Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
0520_UART.cache/wt		0520_UART.cache/wt
0520_UART.hw		0520_UART.hw
0520_UART.ip_user_files		0520_UART.ip_user_files
0520_UART.runs		0520_UART.runs
0520_UART.sim/sim_1/behav/xsim		0520_UART.sim/sim_1/behav/xsim
0520_UART.srcs		0520_UART.srcs
0520_UART.xpr		0520_UART.xpr