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Putting it all Together

Steven Wilson edited this page Dec 3, 2017 · 2 revisions

utting the whole system together seemed like the next issue, but how to package all of this into a complete working system?

I never did solve that issue because at this point the project took a significant turn.

Why not put it all on one board?!?

I learned a lot by designing the level shifter board and PA board, but the fact was that the packaging options for the level shifter interface with RP and the EB104 filter sucked! I could easily build an interface cable from the EB104 to the level shifter, but still – it was a mechanical night mare!

Here is a picture of everything wired up together. What a mess!

Putting this into a coherent package just wasn’t going to happen. There wasn’t any way to pull this mess together.

Enter the single board design below!

This may seem like a lot – but it is really all the component pieces in one place. The only new part of the design here was the LNA in the upper right hand corner. (More about that later).

The lower left – it’s the TAPR LPU re-imagined.

The upper left – it is the 1W PA. The middle top of the board – the TX/RX switch from TAPR. Have you noticed the blatant theft of TAPR IP here? I don’t plan on selling this – please don’t take anything I do and sell it – because you aren’t stealing from me – you are stealing from TAPR!.

Hmm – what about that thing in the middle called PSoC – that was going to be my filter control. It was to take the I2C channel which Pavel had started sending out in the Red Pitaya server code. All I had to do was either interpret what Pavel sent out, or come up with my own variant. I had originally had the option of separate TX filtering and RX filtering in the Level shifter card, and this is still present in this design. The two connectors over to the right of the card were to interface to the EB104 Band Pass Filter and a recently purchased EB104 TX Low Pass filter.

The Red Pitaya would connect to the board through the two headers surrounding the big hole in the middle of the design (to accommodate the heat sink on the RP).

Should be a cake walk- I’ve prototyped most of this – and I designed the PsoC! (Did I mention I work for Cypress Semiconductor?) so I should have all my bases covered..

Well – not so much.

Next: Debugging Revision 1