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Merge branch 'bpf,x64: Use BMI2 for shifts'
Jie Meng says: ==================== With baseline x64 instruction set, shift count can only be an immediate or in %cl. The implicit dependency on %cl makes it necessary to shuffle registers around and/or add push/pop operations. BMI2 provides shift instructions that can use any general register as the shift count, saving us instructions and a few bytes in most cases. Suboptimal codegen when %ecx is source and/or destination is also addressed and unnecessary instructions are removed. test_progs: Summary: 267/1340 PASSED, 25 SKIPPED, 0 FAILED test_progs-no_alu32: Summary: 267/1333 PASSED, 26 SKIPPED, 0 FAILED test_verifier: Summary: 1367 PASSED, 636 SKIPPED, 0 FAILED (same result with or without BMI2) test_maps: OK, 0 SKIPPED lib/test_bpf: test_bpf: Summary: 1026 PASSED, 0 FAILED, [1014/1014 JIT'ed] test_bpf: test_tail_calls: Summary: 10 PASSED, 0 FAILED, [10/10 JIT'ed] test_bpf: test_skb_segment: Summary: 2 PASSED, 0 FAILED --- v4 -> v5: - More comments regarding instruction encoding v3 -> v4: - Fixed a regression when BMI2 isn't available ==================== Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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