This project is a RISC-V ISA based microprocessor. The design contains the RV32E and Zicsr instruction sets along with some registers from Machine level. Except the basic functions this MPU is capable to execute Interrupts-Exceptions with simple requirements. In the components folder you will find all of the modules in VHDL, the RISCV_CPU.bdf in the img folder is the schematic of this MPU and the RISCV_CPU.vhd is the transleted schematic to VHDL. At report.pdf in docs folder you can find infrormation about the project.