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doc: fix configuration in baseband 5GNR driver guide
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[ upstream commit a46c1225141d2c099c70d98b38f1f9c20307ff6f ]

flr_timeout was removed from the code a while ago, updating doc.
Fix minor typo in 5GNR example.

Fixes: 2d43064 ("baseband/fpga_5gnr_fec: add configure function")

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
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Hernanlv authored and kevintraynor committed Mar 8, 2024
1 parent a5224aa commit c2671c9
Showing 1 changed file with 1 addition and 6 deletions.
7 changes: 1 addition & 6 deletions doc/guides/bbdevs/fpga_5gnr_fec.rst
Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
uint8_t dl_bandwidth;
uint8_t ul_load_balance;
uint8_t dl_load_balance;
uint16_t flr_time_out;
};
- ``pf_mode_en``: identifies whether only PF is to be used, or the VFs. PF and
Expand All @@ -191,10 +190,6 @@ parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
If all hardware queues exceeds the watermark, no code blocks will be
streamed in from UL/DL code block FIFO.

- ``flr_time_out``: specifies how many 16.384us to be FLR time out. The
time_out = flr_time_out x 16.384us. For instance, if you want to set 10ms for
the FLR time out then set this setting to 0x262=610.


An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown
below:
Expand All @@ -219,7 +214,7 @@ below:
/* setup FPGA PF */
ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf);
TEST_ASSERT_SUCCESS(ret,
"Failed to configure 4G FPGA PF for bbdev %s",
"Failed to configure 5GNR FPGA PF for bbdev %s",
info->dev_name);
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