doc: update BIOS settings and supported HW for NTB

[ upstream commit 00e57b0e550b7df2047e6d0bde8965c7ae17d203 ]

Update BIOS settings and supported platform list for Intel NTB.

Fixes: f5057be ("raw/ntb: support Intel Ice Lake")

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>

doc/guides/rawdevs/ntb.rst

@@ -1,6 +1,8 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2018 Intel Corporation.
 
+.. include:: <isonum.txt>
+
 NTB Rawdev Driver
 =================
 
@@ -17,19 +19,23 @@ some information by using scratchpad registers.
 BIOS setting on Intel Xeon
 --------------------------
 
-Intel Non-transparent Bridge needs special BIOS setting. The reference for
-Skylake is https://www.intel.com/content/dam/support/us/en/documents/server-products/Intel_Xeon_Processor_Scalable_Family_BIOS_User_Guide.pdf
-
-- Set the needed PCIe port as NTB to NTB mode on both hosts.
-- Enable NTB bars and set bar size of bar 23 and bar 45 as 12-29 (4K-512M)
-  on both hosts (for Ice Lake, bar size can be set as 12-51, namely 4K-128PB).
-  Note that bar size on both hosts should be the same.
-- Disable split bars for both hosts.
-- Set crosslink control override as DSD/USP on one host, USD/DSP on
-  another host.
-- Disable PCIe PII SSC (Spread Spectrum Clocking) for both hosts. This
-  is a hardware requirement.
-
+Intel Non-transparent Bridge (NTB) needs special BIOS settings on both systems.
+Note that for 4th Generation Intel\ |reg| Xeon\ |reg| Scalable Processors,
+option ``Port Subsystem Mode`` should be changed from ``Gen5`` to ``Gen4 Only``,
+then reboot.
+
+- Set ``Non-Transparent Bridge PCIe Port Definition`` for needed PCIe ports
+  as ``NTB to NTB`` mode, on both hosts.
+- Set ``Enable NTB BARs`` as ``Enabled``, on both hosts.
+- Set ``Enable SPLIT BARs`` as ``Disabled``, on both hosts.
+- Set ``Imbar1 Size``, ``Imbar2 Size``, ``Embar1 Size`` and ``Embar2 Size``,
+  as 12-29 (i.e., 4K-512M) for 2nd Generation Intel\ |reg| Xeon\ |reg| Scalable Processors;
+  as 12-51 (i.e., 4K-128PB) for 3rd and 4th Generation Intel\ |reg| Xeon\ |reg| Scalable Processors.
+  Note that those bar sizes on both hosts should be the same.
+- Set ``Crosslink Control override`` as ``DSD/USP`` on one host,
+  ``USD/DSP`` on another host.
+- Set ``PCIe PLL SSC (Spread Spectrum Clocking)`` as ``Disabled``, on both hosts.
+  This is a hardware requirement when using Re-timer Cards.
 
 Device Setup
 ------------
@@ -145,4 +151,8 @@ like the following:
 Limitation
 ----------
 
-- This PMD only supports Intel Skylake and Ice Lake platforms.
+This PMD is only supported on Intel Xeon Platforms:
+
+- 4th Generation Intel® Xeon® Scalable Processors.
+- 3rd Generation Intel® Xeon® Scalable Processors.
+- 2nd Generation Intel® Xeon® Scalable Processors.