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22 changes: 22 additions & 0 deletions
22
devices/rockchip_armv8/diy/package/boot/uboot-envtools/files/rockchip
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# | ||
# Copyright (C) 2023 OpenWrt.org | ||
# | ||
[ -e /etc/config/ubootenv ] && exit 0 | ||
|
||
touch /etc/config/ubootenv | ||
|
||
. /lib/uboot-envtools.sh | ||
. /lib/functions.sh | ||
|
||
board=$(board_name) | ||
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||
case "$board" in | ||
lyt,t68m) | ||
ubootenv_add_uci_config "/dev/mmcblk0" "0x3f8000" "0x8000" | ||
;; | ||
esac | ||
|
||
config_load ubootenv | ||
config_foreach ubootenv_add_app_config | ||
|
||
exit 0 |
90 changes: 90 additions & 0 deletions
90
.../package/boot/uboot-rockchip/patches/316-rockchip-rk3566-Add-support-for-panther-x2.patch
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@@ -0,0 +1,90 @@ | ||
--- /dev/null | ||
+++ b/configs/panther-x2-rk3566_defconfig | ||
@@ -0,0 +1,87 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_COUNTER_FREQUENCY=24000000 | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | ||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" | ||
+CONFIG_ROCKCHIP_RK3568=y | ||
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_MMC=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_TARGET_EVB_RK3568=y | ||
+CONFIG_SPL_STACK=0x400000 | ||
+CONFIG_DEBUG_UART_BASE=0xFE660000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+CONFIG_SPL_MAX_SIZE=0x40000 | ||
+CONFIG_SPL_PAD_TO=0x7f8000 | ||
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | ||
+CONFIG_SPL_BSS_START_ADDR=0x4000000 | ||
+CONFIG_SPL_BSS_MAX_SIZE=0x4000 | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_I2C=y | ||
+CONFIG_CMD_MMC=y | ||
+CONFIG_CMD_USB=y | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_NET_RANDOM_ETHADDR=y | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_CLK_SCMI=y | ||
+CONFIG_RESET_SCMI=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_SUPPORT_EMMC_RPMB=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_DM_PMIC=y | ||
+CONFIG_PMIC_RK8XX=y | ||
+CONFIG_SPL_PMIC_RK8XX=y | ||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y | ||
+CONFIG_REGULATOR_PWM=y | ||
+CONFIG_REGULATOR_RK8XX=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_DM_RESET=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYS_NS16550_MEM32=y | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_USB=y | ||
+CONFIG_USB_XHCI_HCD=y | ||
+CONFIG_USB_XHCI_DWC3=y | ||
+CONFIG_USB_EHCI_HCD=y | ||
+CONFIG_USB_EHCI_GENERIC=y | ||
+CONFIG_USB_DWC3=y | ||
+CONFIG_USB_DWC3_GENERIC=y | ||
+CONFIG_ERRNO_STR=y |
116 changes: 116 additions & 0 deletions
116
...iy/package/boot/uboot-rockchip/patches/316-rockchip-rk3568-Add-support-for-lyt_t68m.patch
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@@ -0,0 +1,116 @@ | ||
--- /dev/null | ||
+++ b/arch/arm/dts/rk3568-lyt-t68m-u-boot.dtsi | ||
@@ -0,0 +1,16 @@ | ||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
+ | ||
+#include "rk356x-u-boot.dtsi" | ||
+ | ||
+/ { | ||
+ chosen { | ||
+ stdout-path = &uart2; | ||
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; | ||
+ }; | ||
+}; | ||
+ | ||
+&uart2 { | ||
+ clock-frequency = <24000000>; | ||
+ bootph-pre-ram; | ||
+ status = "okay"; | ||
+}; | ||
--- /dev/null | ||
+++ b/arch/arm/dts/rk3568-lyt-t68m.dts | ||
@@ -0,0 +1,8 @@ | ||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
+ | ||
+#include "rk3568-evb.dts" | ||
+ | ||
+/ { | ||
+ model = "LYT T68M"; | ||
+ compatible = "lyt,t68m", "rockchip,rk3568"; | ||
+}; | ||
--- /dev/null | ||
+++ b/configs/lyt-t68m-rk3568_defconfig | ||
@@ -0,0 +1,83 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_COUNTER_FREQUENCY=24000000 | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | ||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-lyt-t68m" | ||
+CONFIG_ROCKCHIP_RK3568=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_SPL_STACK=0x400000 | ||
+CONFIG_DEBUG_UART_BASE=0xFE660000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_LEGACY_IMAGE_FORMAT=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-lyt-t68m.dtb" | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+CONFIG_SPL_MAX_SIZE=0x40000 | ||
+CONFIG_SPL_PAD_TO=0x7f8000 | ||
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | ||
+CONFIG_SPL_BSS_START_ADDR=0x4000000 | ||
+CONFIG_SPL_BSS_MAX_SIZE=0x4000 | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_I2C=y | ||
+CONFIG_CMD_MMC=y | ||
+CONFIG_CMD_USB=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+CONFIG_CMD_PMIC=y | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_SUPPORT_EMMC_RPMB=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y | ||
+CONFIG_SPL_PINCTRL=y | ||
+CONFIG_DM_PMIC=y | ||
+CONFIG_PMIC_RK8XX=y | ||
+CONFIG_REGULATOR_RK8XX=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYS_NS16550_MEM32=y | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_USB=y | ||
+CONFIG_USB_XHCI_HCD=y | ||
+CONFIG_USB_XHCI_DWC3=y | ||
+CONFIG_USB_EHCI_HCD=y | ||
+CONFIG_USB_EHCI_GENERIC=y | ||
+CONFIG_USB_OHCI_HCD=y | ||
+CONFIG_USB_OHCI_GENERIC=y | ||
+CONFIG_USB_DWC3=y | ||
+CONFIG_ERRNO_STR=y |
90 changes: 90 additions & 0 deletions
90
...age/boot/uboot-rockchip/patches/317-rockchip-rk3566-Add-support-for-seewo-sv21-3568.patch
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,90 @@ | ||
--- /dev/null | ||
+++ b/configs/seewo-sv21-rk3568_defconfig | ||
@@ -0,0 +1,87 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_COUNTER_FREQUENCY=24000000 | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | ||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" | ||
+CONFIG_ROCKCHIP_RK3568=y | ||
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_MMC=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_TARGET_EVB_RK3568=y | ||
+CONFIG_SPL_STACK=0x400000 | ||
+CONFIG_DEBUG_UART_BASE=0xFE660000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+CONFIG_SPL_MAX_SIZE=0x40000 | ||
+CONFIG_SPL_PAD_TO=0x7f8000 | ||
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | ||
+CONFIG_SPL_BSS_START_ADDR=0x4000000 | ||
+CONFIG_SPL_BSS_MAX_SIZE=0x4000 | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_I2C=y | ||
+CONFIG_CMD_MMC=y | ||
+CONFIG_CMD_USB=y | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_NET_RANDOM_ETHADDR=y | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_CLK_SCMI=y | ||
+CONFIG_RESET_SCMI=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_SUPPORT_EMMC_RPMB=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_DM_PMIC=y | ||
+CONFIG_PMIC_RK8XX=y | ||
+CONFIG_SPL_PMIC_RK8XX=y | ||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y | ||
+CONFIG_REGULATOR_PWM=y | ||
+CONFIG_REGULATOR_RK8XX=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_DM_RESET=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYS_NS16550_MEM32=y | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_USB=y | ||
+CONFIG_USB_XHCI_HCD=y | ||
+CONFIG_USB_XHCI_DWC3=y | ||
+CONFIG_USB_EHCI_HCD=y | ||
+CONFIG_USB_EHCI_GENERIC=y | ||
+CONFIG_USB_DWC3=y | ||
+CONFIG_USB_DWC3_GENERIC=y | ||
+CONFIG_ERRNO_STR=y |
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