Add more Intel Sierra Forest instructions (#129)

Add MSRLIST and WRMSRNS Intel Sierra Forest instructions. Signed-off-by: Muyassarov, Feruzjon <feruzjon.muyassarov@intel.com>
klauspost · Feb 20, 2023 · 9c59398 · 9c59398
1 parent 9e22c36
commit 9c59398
Show file tree

Hide file tree

Showing 3 changed files with 109 additions and 101 deletions.
diff --git a/README.md b/README.md
@@ -380,8 +380,9 @@ Exit Code 1
 | MOVDIRI            | Move Doubleword as Direct Store                                                                                                                                                    |
 | MOVSB_ZL           | Fast Zero-Length MOVSB                                                                                                                                                             |
 | MPX                | Intel MPX (Memory Protection Extensions)                                                                                                                                           |
-| MOVU               | MOVU SSE instructions are more efficient and should be preferred to SSE	MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD        |
+| MOVU               | MOVU SSE instructions are more efficient and should be preferred to SSE	MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD       |
 | MSRIRC             | Instruction Retired Counter MSR available                                                                                                                                          |
+| MSRLIST            | Read/Write List of Model Specific Registers                                                                                                                                        |
 | MSR_PAGEFLUSH      | Page Flush MSR available                                                                                                                                                           |
 | NRIPS              | Indicates support for NRIP save on VMEXIT                                                                                                                                          |
 | NX                 | NX (No-Execute) bit                                                                                                                                                                |
@@ -448,6 +449,7 @@ Exit Code 1
 | VTE                | AMD Virtual Transparent Encryption supported                                                                                                                                       |
 | WAITPKG            | TPAUSE, UMONITOR, UMWAIT                                                                                                                                                           |
 | WBNOINVD           | Write Back and Do Not Invalidate Cache                                                                                                                                             |
+| WRMSRNS            | Non-Serializing Write to Model Specific Register                                                                                                                                   |
 | X87                | FPU                                                                                                                                                                                |
 | XGETBV1            | Supports XGETBV with ECX = 1                                                                                                                                                       |
 | XOP                | Bulldozer XOP functions                                                                                                                                                            |

diff --git a/cpuid.go b/cpuid.go
@@ -173,6 +173,7 @@ const (
 	MOVU                                // AMD: MOVU SSE instructions are more efficient and should be preferred to SSE	MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD
 	MPX                                 // Intel MPX (Memory Protection Extensions)
 	MSRIRC                              // Instruction Retired Counter MSR available
+	MSRLIST                             // Read/Write List of Model Specific Registers
 	MSR_PAGEFLUSH                       // Page Flush MSR available
 	NRIPS                               // Indicates support for NRIP save on VMEXIT
 	NX                                  // NX (No-Execute) bit
@@ -239,6 +240,7 @@ const (
 	VTE                                 // AMD Virtual Transparent Encryption supported
 	WAITPKG                             // TPAUSE, UMONITOR, UMWAIT
 	WBNOINVD                            // Write Back and Do Not Invalidate Cache
+	WRMSRNS                             // Non-Serializing Write to Model Specific Register
 	X87                                 // FPU
 	XGETBV1                             // Supports XGETBV with ECX = 1
 	XOP                                 // Bulldozer XOP functions
@@ -1235,7 +1237,9 @@ func support() flagSet {
 				fs.setIf(edx&(1<<25) != 0, AMXINT8)
 				// eax1 = CPUID.(EAX=7, ECX=1).EAX
 				fs.setIf(eax1&(1<<5) != 0, AVX512BF16)
+				fs.setIf(eax1&(1<<19) != 0, WRMSRNS)
 				fs.setIf(eax1&(1<<21) != 0, AMXFP16)
+				fs.setIf(eax1&(1<<27) != 0, MSRLIST)
 			}
 		}
 

diff --git a/featureid_string.go b/featureid_string.go