target-mips: fix updating BadVAddr for misaligned accesses

Update BadVAddr correctly for the case of misaligned block accesses.
The address reported by BadVAddr on page permission or TLB miss exceptions
must be a byte address in the misaligned access for a page on which the
exception is reported, but may be any such byte address.
It is not required to be the lowest.

Updates for qemu#17

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>

target-mips/helper.c

@@ -758,6 +758,9 @@ bool cpu_mips_validate_access(CPUMIPSState *env, target_ulong address,
     ret = get_physical_address(env, &physical, &prot,
             addr, rw, access_type);
     if (ret != TLBRET_MATCH) {
+        if (ret != TLBRET_BADADDR && addr > badvaddr) {
+            badvaddr = addr;
+        }
         raise_mmu_exception(env, badvaddr, rw, ret);
         return false;
     }