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ar71xx: add support for YunCore AP90Q
YunCore AP90Q is an outdoor CPE/AP based on Qualcomm/Atheros QCA9531 v2. Short specification: - 650/600/216 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet, passive PoE support - 64/128 MB of RAM (DDR2) - 16 MB of FLASH - 2T2R 2.4 GHz with external PA, up to 29 dBm - 2x internal 5 dBi omni antennas - 4x LED, 1x button - UART (JP1) header on PCB Flash instruction under U-Boot, using UART: 1. tftp 0x80060000 lede-ar71xx-generic-ap90q-squashfs-sysupgrade 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Flash instruction under vendor fimrware, using telnet/SSH: 1. Connect PC with 192.168.1.x address to WAN port 2. Power up device, enter failsafe mode with button (no LED indicator!) 3. Change root password and reboot (mount_root, passwd ..., reboot -f) 4. Upload lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin to /tmp using SCP 5. Connect PC with 192.168.188.x address to LAN port, SSH to 192.168.188.253 6. Invoke: - cd /tmp - fw_setenv bootcmd "bootm 0x9f050000" - mtd erase firmware - mtd -r write lede-ar71xx-generic-ap90q-squashfs-sysupgrade.bin firmware Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
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@@ -178,6 +178,7 @@ platform_check_image() { | |
| ap132|\ | ||
| ap81|\ | ||
| ap83|\ | ||
| ap90q|\ | ||
| bullet-m|\ | ||
| c-55|\ | ||
| carambola2|\ | ||
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| /* | ||
| * YunCore AP90Q board support | ||
| * | ||
| * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com> | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify it | ||
| * under the terms of the GNU General Public License version 2 as published | ||
| * by the Free Software Foundation. | ||
| */ | ||
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| #include <linux/gpio.h> | ||
| #include <linux/platform_device.h> | ||
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| #include <asm/mach-ath79/ath79.h> | ||
| #include <asm/mach-ath79/ar71xx_regs.h> | ||
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| #include "common.h" | ||
| #include "dev-eth.h" | ||
| #include "dev-gpio-buttons.h" | ||
| #include "dev-leds-gpio.h" | ||
| #include "dev-m25p80.h" | ||
| #include "dev-usb.h" | ||
| #include "dev-wmac.h" | ||
| #include "machtypes.h" | ||
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| #define AP90Q_GPIO_LED_WAN 4 | ||
| #define AP90Q_GPIO_LED_WLAN 12 | ||
| #define AP90Q_GPIO_LED_LAN 16 | ||
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| #define AP90Q_GPIO_BTN_RESET 17 | ||
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| #define AP90Q_KEYS_POLL_INTERVAL 20 | ||
| #define AP90Q_KEYS_DEBOUNCE_INTERVAL (3 * AP90Q_KEYS_POLL_INTERVAL) | ||
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| static struct gpio_led ap90q_leds_gpio[] __initdata = { | ||
| { | ||
| .name = "ap90q:green:lan", | ||
| .gpio = AP90Q_GPIO_LED_LAN, | ||
| .active_low = 1, | ||
| }, | ||
| { | ||
| .name = "ap90q:green:wan", | ||
| .gpio = AP90Q_GPIO_LED_WAN, | ||
| .active_low = 1, | ||
| }, | ||
| { | ||
| .name = "ap90q:green:wlan", | ||
| .gpio = AP90Q_GPIO_LED_WLAN, | ||
| .active_low = 1, | ||
| }, | ||
| }; | ||
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| static struct gpio_keys_button ap90q_gpio_keys[] __initdata = { | ||
| { | ||
| .desc = "reset", | ||
| .type = EV_KEY, | ||
| .code = KEY_RESTART, | ||
| .debounce_interval = AP90Q_KEYS_DEBOUNCE_INTERVAL, | ||
| .gpio = AP90Q_GPIO_BTN_RESET, | ||
| .active_low = 1, | ||
| }, | ||
| }; | ||
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| static void __init ap90q_gpio_setup(void) | ||
| { | ||
| /* For LED on GPIO4 */ | ||
| ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN); | ||
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| ath79_gpio_direction_select(AP90Q_GPIO_LED_LAN, true); | ||
| ath79_gpio_direction_select(AP90Q_GPIO_LED_WAN, true); | ||
| ath79_gpio_direction_select(AP90Q_GPIO_LED_WLAN, true); | ||
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| /* Mute LEDs on boot */ | ||
| gpio_set_value(AP90Q_GPIO_LED_LAN, 1); | ||
| gpio_set_value(AP90Q_GPIO_LED_WAN, 1); | ||
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| ath79_gpio_output_select(AP90Q_GPIO_LED_LAN, 0); | ||
| ath79_gpio_output_select(AP90Q_GPIO_LED_WAN, 0); | ||
| ath79_gpio_output_select(AP90Q_GPIO_LED_WLAN, 0); | ||
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| ath79_register_leds_gpio(-1, ARRAY_SIZE(ap90q_leds_gpio), | ||
| ap90q_leds_gpio); | ||
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| ath79_register_gpio_keys_polled(-1, AP90Q_KEYS_POLL_INTERVAL, | ||
| ARRAY_SIZE(ap90q_gpio_keys), | ||
| ap90q_gpio_keys); | ||
| } | ||
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| static void __init ap90q_setup(void) | ||
| { | ||
| u8 *art = (u8 *) KSEG1ADDR(0x1fff1000); | ||
| u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); | ||
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| ath79_register_m25p80(NULL); | ||
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| ap90q_gpio_setup(); | ||
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| ath79_setup_ar933x_phy4_switch(false, false); | ||
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| ath79_register_mdio(0, 0x0); | ||
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| ath79_switch_data.phy4_mii_en = 1; | ||
| ath79_switch_data.phy_poll_mask |= BIT(4); | ||
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| /* LAN */ | ||
| ath79_eth1_data.duplex = DUPLEX_FULL; | ||
| ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; | ||
| ath79_eth1_data.speed = SPEED_1000; | ||
| ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); | ||
| ath79_register_eth(1); | ||
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| /* WAN */ | ||
| ath79_eth0_data.duplex = DUPLEX_FULL; | ||
| ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; | ||
| ath79_eth0_data.speed = SPEED_100; | ||
| ath79_eth0_data.phy_mask = BIT(4); | ||
| ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); | ||
| ath79_register_eth(0); | ||
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| ath79_register_wmac(art, NULL); | ||
| } | ||
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| MIPS_MACHINE(ATH79_MACH_AP90Q, "AP90Q", "YunCore AP90Q", ap90q_setup); |
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