GitHub - leepoly/LvNA-with-boom: Trying to migrate boom into LvNA system with both emulator and FPGA support

For a quick start flow about Labeled RISC-V, please refer to the README.md under fpga/ directory.

Name		Name	Last commit message	Last commit date
Latest commit History 6,965 Commits
.github		.github
bootrom		bootrom
chisel3 @ 9a0ce22		chisel3 @ 9a0ce22
csrc		csrc
emulator		emulator
firrtl @ 2272044		firrtl @ 2272044
fpga		fpga
hardfloat @ 45f5ae1		hardfloat @ 45f5ae1
macros/src/main/scala		macros/src/main/scala
project		project
regression		regression
scripts		scripts
src/main		src/main
torture @ 77195ab		torture @ 77195ab
vsim		vsim
.gitignore		.gitignore
.gitmodules		.gitmodules
.travis.yml		.travis.yml
LICENSE.Berkeley		LICENSE.Berkeley
LICENSE.SiFive		LICENSE.SiFive
LICENSE.jtag		LICENSE.jtag
Makefrag		Makefrag
README.md		README.md
README_LvNA.md		README_LvNA.md
README_TRAVIS.md		README_TRAVIS.md
build.sbt		build.sbt
origin_rocket_README.md		origin_rocket_README.md
riscv-tools.hash		riscv-tools.hash
sbt-launch.jar		sbt-launch.jar

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