Add coreir simulator target

leonardt · Aug 15, 2018 · 9ffe1cb · 9ffe1cb
1 parent 1544274
commit 9ffe1cb
Show file tree

Hide file tree

Showing 3 changed files with 20 additions and 10 deletions.
diff --git a/fault/python_simulator_target.py → fault/magma_simulator_target.py b/fault/python_simulator_target.py → fault/magma_simulator_target.py
@@ -1,6 +1,7 @@
 import fault.logging
 from .target import Target
 from magma.simulator.python_simulator import PythonSimulator
+from magma.simulator.coreir_simulator import CoreIRSimulator
 from fault.array import Array
 from bit_vector import BitVector
 from fault.value import Value
@@ -12,14 +13,20 @@ def convert_value(val):
     return val
 
 
-class PythonSimulatorTarget(Target):
-    def __init__(self, circuit, test_vectors, clock=None):
+class MagmaSimulatorTarget(Target):
+    def __init__(self, circuit, test_vectors, clock=None, backend="python"):
         super().__init__(circuit, test_vectors)
         self._clock = clock
         self._simulator = None
+        if backend == "python":
+            self.backend = PythonSimulator
+        elif backend == "coreir":
+            self.backend = CoreIRSimulator
+        else:
+            raise NotImplementedError(backend)
 
     def init_simulator(self):
-        self._simulator = PythonSimulator(self._circuit, self._clock)
+        self._simulator = self.backend(self._circuit, self._clock)
 
     def __set_value(self, port, val):
         fault.logging.debug(f"Setting {self._circuit.name}.{port.name.name} to "

diff --git a/fault/tester.py b/fault/tester.py
@@ -2,7 +2,7 @@
 import magma as m
 import functools
 from .verilator_target import VerilatorTarget
-from .python_simulator_target import PythonSimulatorTarget
+from .magma_simulator_target import MagmaSimulatorTarget
 from fault.array import Array
 from .value import AnyValue
 import copy
@@ -113,8 +113,11 @@ def compile_and_run(self, target="verilator", **kwargs):
         if target == "verilator":
             target = VerilatorTarget(self.circuit, self.test_vectors, **kwargs)
         elif target == "python":
-            target = PythonSimulatorTarget(self.circuit, self.test_vectors,
-                                           **kwargs)
+            target = MagmaSimulatorTarget(self.circuit, self.test_vectors,
+                                          backend='python', **kwargs)
+        elif target == "coreir":
+            target = MagmaSimulatorTarget(self.circuit, self.test_vectors,
+                                          backend='coreir', **kwargs)
         else:
             raise NotImplementedError(target)
 

diff --git a/tests/test_python_simulator_target.py → tests/test_magma_simulator_target.py b/tests/test_python_simulator_target.py → tests/test_magma_simulator_target.py
@@ -1,6 +1,6 @@
 import random
 import common
-from fault.python_simulator_target import PythonSimulatorTarget
+from fault.magma_simulator_target import MagmaSimulatorTarget
 from bit_vector import BitVector
 import fault
 
@@ -14,7 +14,7 @@ def test_python_simulator_target_basic():
         [BitVector(0, 1), BitVector(0, 1)],
         [BitVector(1, 1), BitVector(1, 1)]
     ]
-    target = PythonSimulatorTarget(circ, test_vectors, None)
+    target = MagmaSimulatorTarget(circ, test_vectors, None)
     target.run()
 
 
@@ -28,7 +28,7 @@ def test_python_simulator_target_nested_arrays():
     for i, val in enumerate(expected):
         tester.expect(circ.O[i], val)
 
-    target = PythonSimulatorTarget(circ, tester.test_vectors, None)
+    target = MagmaSimulatorTarget(circ, tester.test_vectors, None)
     target.run()
 
 
@@ -38,5 +38,5 @@ def test_python_simulator_target_clock():
         [BitVector(0, 1), BitVector(0, 1), BitVector(0, 1)],
         [BitVector(0, 1), BitVector(0, 1), BitVector(1, 1)]
     ]
-    target = PythonSimulatorTarget(circ, test_vectors, circ.CLK)
+    target = MagmaSimulatorTarget(circ, test_vectors, circ.CLK)
     target.run()