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Update eval and expect semantics
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This now matches verilator's semantics, where expect is equivalent to
asserting a peek. So, the user must now call `eval` before `expect` if
the expected value reflects newly poked inputs. Compare this to before,
where `expect` meant " this is the expected value when the next eval is
called".
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leonardt committed Jul 25, 2018
1 parent 46200b7 commit a503154
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Showing 5 changed files with 31 additions and 14 deletions.
2 changes: 1 addition & 1 deletion fault/python_simulator_target.py
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,6 @@ def run(self):
(inputs, steps, outputs) = self.__parse_tv(tv)
self.__process_inputs(inputs)
evaluate = self.__process_clock(steps)
self.__process_outputs(outputs)
if evaluate:
self._simulator.evaluate()
self.__process_outputs(outputs)
25 changes: 19 additions & 6 deletions fault/tester.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,15 +31,18 @@ def __init__(self, circuit, clock=None):
# Initialize first test vector to all Nones
initial_vector = []
for port in self.ports.values():
if isinstance(port, m._BitType):
val = BitVector(None, 1)
elif isinstance(port, m.ArrayType):
val = self.get_array_val(port)
else:
raise NotImplementedError(port)
val = self.get_initial_value(port)
initial_vector.append(val)
self.test_vectors.append(initial_vector)

def get_initial_value(self, port):
if isinstance(port, m._BitType):
return BitVector(None, 1)
elif isinstance(port, m.ArrayType):
return self.get_array_val(port)
else:
raise NotImplementedError(port)

def get_array_val(self, arr):
if isinstance(arr.T, m._BitKind):
val = BitVector(None, len(arr))
Expand Down Expand Up @@ -80,7 +83,17 @@ def expect(self, port, value):
self.add_test_vector(port, value)

def eval(self):
"""
Finalize the current test vector by making a copy
For the new test vector,
(1) Set all inputs to retain their previous value
(2) Set all expected outputs to None (X) for the new test vector
"""
self.test_vectors.append(copy.deepcopy(self.test_vectors[-1]))
for port in self.ports.values():
if port.isinput():
self.test_vectors[-1][self.get_index(port)] = \
self.get_initial_value(port)

def step(self):
if self.clock_index is None:
Expand Down
2 changes: 1 addition & 1 deletion fault/verilator_target.py
Original file line number Diff line number Diff line change
Expand Up @@ -139,8 +139,8 @@ def to_string(t):

source += f'''\
std::cout << std::endl;
top->eval();
{output_str}
top->eval();
'''
source += '''\
}
Expand Down
10 changes: 6 additions & 4 deletions tests/test_python_simulator_target.py
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
import random
import magma as m
import common
from fault.python_simulator_target import *
from fault.python_simulator_target import PythonSimulatorTarget
from bit_vector import BitVector
import fault


def test_python_simulator_target_basic():
Expand All @@ -21,9 +21,11 @@ def test_python_simulator_target_basic():
def test_python_simulator_target_nested_arrays():
circ = common.TestNestedArraysCircuit
tester = fault.Tester(circ)
for i in range(3):
val = random.randint(0, (1 << 4) - 1)
expected = [random.randint(0, (1 << 4) - 1) for i in range(3)]
for i, val in enumerate(expected):
tester.poke(circ.I[i], val)
tester.eval()
for i, val in enumerate(expected):
tester.expect(circ.O[i], val)

target = PythonSimulatorTarget(circ, tester.test_vectors, None)
Expand Down
6 changes: 4 additions & 2 deletions tests/test_verilator_target.py
Original file line number Diff line number Diff line change
Expand Up @@ -25,9 +25,11 @@ def test_verilator_target_basic():
def test_tester_nested_arrays():
circ = common.TestNestedArraysCircuit
tester = fault.Tester(circ)
for i in range(3):
val = random.randint(0, (1 << 4) - 1)
expected = [random.randint(0, (1 << 4) - 1) for i in range(3)]
for i, val in enumerate(expected):
tester.poke(circ.I[i], val)
tester.eval()
for i, val in enumerate(expected):
tester.expect(circ.O[i], val)

with tempfile.TemporaryDirectory() as tempdir:
Expand Down

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