Skip to content

Commit

Permalink
Skip internal register hack
Browse files Browse the repository at this point in the history
  • Loading branch information
leonardt committed Dec 7, 2023
1 parent 1c08e42 commit e44b671
Showing 1 changed file with 1 addition and 0 deletions.
1 change: 1 addition & 0 deletions tests/test_setattr_interface.py
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ def test_tester_magma_internal_signals(target, simulator, capsys):
assert expected == actual, "Print of internal register value did not work"


@pytest.mark.skip("Unsupported for MLIR")
def test_tester_poke_internal_register(target, simulator, capsys):
if target == "python":
pytest.skip("Wrapped verilog not supported by Python simulator")
Expand Down

0 comments on commit e44b671

Please sign in to comment.