Skip to content

Commit

Permalink
Merge pull request #72 from leonardt/rebind-bv
Browse files Browse the repository at this point in the history
Rebind bv
  • Loading branch information
cdonovick committed Jul 18, 2019
2 parents 228ab0b + a8fdcd4 commit 17fd709
Show file tree
Hide file tree
Showing 5 changed files with 62 additions and 8 deletions.
13 changes: 5 additions & 8 deletions hwtypes/adt_meta.py
Original file line number Diff line number Diff line change
Expand Up @@ -12,13 +12,6 @@
__all__ = ['BoundMeta', 'TupleMeta', 'ProductMeta', 'SumMeta', 'EnumMeta']


def _issubclass(sub : tp.Any, parent : type) -> bool:
try:
return issubclass(sub, parent)
except TypeError:
return False


def _is_dunder(name):
return (len(name) > 4
and name[:2] == name[-2:] == '__'
Expand Down Expand Up @@ -355,7 +348,11 @@ def rebind(cls, A : type, B : type):
new_fields[field] = T.rebind(A, B)
else:
new_fields[field] = T
return cls.unbound_t.from_fields(cls.__name__, new_fields, cls.__module__, cls.__qualname__)

if new_fields != cls.field_dict:
return cls.unbound_t.from_fields(cls.__name__, new_fields, cls.__module__, cls.__qualname__)
else:
return cls

class SumMeta(BoundMeta):
def __new__(mcs, name, bases, namespace, fields=None, **kwargs):
Expand Down
19 changes: 19 additions & 0 deletions hwtypes/adt_util.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
from .adt_meta import BoundMeta
from .bit_vector_abc import AbstractBitVectorMeta, AbstractBitVector

from .util import _issubclass

def rebind_bitvector(adt, bv_type: AbstractBitVectorMeta):
if _issubclass(adt, AbstractBitVector):
if adt.is_sized:
return bv_type[adt.size]
else:
return bv_type
elif isinstance(adt, BoundMeta):
new_adt = adt
for field in adt.fields:
new_field = rebind_bitvector(field, bv_type)
new_adt = new_adt.rebind(field, new_field)
return new_adt
else:
return adt
1 change: 1 addition & 0 deletions hwtypes/bit_vector_abc.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@
import weakref
import warnings

from .util import _issubclass

TypeFamily = namedtuple('TypeFamily', ['Bit', 'BitVector', 'Unsigned', 'Signed'])

Expand Down
9 changes: 9 additions & 0 deletions hwtypes/util.py
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
import typing as tp

class TypedProperty:
'''
Behaves mostly like property except:
Expand Down Expand Up @@ -82,3 +84,10 @@ def setter(self, fset):

def deleter(self, fdel):
return type(self)(self.T)(self.fget, self.fset, fdel, self.__doc__)


def _issubclass(sub : tp.Any, parent : type) -> bool:
try:
return issubclass(sub, parent)
except TypeError:
return False
28 changes: 28 additions & 0 deletions tests/test_adt.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,8 @@
from hwtypes.adt import Product, Sum, Enum, Tuple
from hwtypes.adt_meta import _RESERVED_NAMES, ReservedNameError
from hwtypes.modifiers import new
from hwtypes.adt_util import rebind_bitvector
from hwtypes.bit_vector import AbstractBitVector, BitVector

class En1(Enum):
a = 0
Expand Down Expand Up @@ -281,3 +283,29 @@ def test_rebind_recusrive():
P4 = P3.rebind(C, D)
assert P4.C == D
assert D in P4.S1.fields
P5 = P2.rebind(P1, A)
assert P5.S1 == Sum[C, A]


class F(Product):
Y = AbstractBitVector


class P(Product):
X = AbstractBitVector[16]
S = Sum[AbstractBitVector[4], AbstractBitVector[8]]
T = Tuple[AbstractBitVector[32]]
F = F


def test_rebind_bv():
P_bound = rebind_bitvector(P, BitVector)
assert P_bound.X == BitVector[16]
assert P_bound.S == Sum[BitVector[4], BitVector[8]]
assert P_bound.T[0] == BitVector[32]
assert P_bound.F.Y == BitVector

P_unbound = rebind_bitvector(P_bound, AbstractBitVector)
assert P_unbound.X == AbstractBitVector[16]
assert P_unbound.S == Sum[AbstractBitVector[4], AbstractBitVector[8]]
assert P_unbound.T[0] == AbstractBitVector[32]

0 comments on commit 17fd709

Please sign in to comment.