Add support for string port

[leonardt]

Needed for the coreir verilog backend which represents the verilog ports of the primitive using a vector of strings

[rdaly525]

Fine for compatibility purposes. But in the future this should not be needed as ideally this AST is the verilog mechanism for CoreIR.

[leonardt]

Yes, this would involve rewriting the definitions of the coreir verilog primitives to be compatible with the verilogAST, but for now this was easier to get something working