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Add linebreaks to module/instance codegen #37
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This will break magma/mantle regression tests because of the verilog code generation changes, so we should be sure to update those tests when we merge/release this |
While we're here, I think we should think a little bit more about customizability of code-generation. Someone may prefer 2 lines between statements, someone 1 line; someone may prefer all ports on one line, some on multiple; etc. The fact that someone's preference on what their output verilog looks like would cause us to update all magma/mantle golds is, to me, an indicator that we should employ some configurability. For example llvm has this: https://clang.llvm.org/docs/ClangFormatStyleOptions.html. We don't need to think of the full configuration space right now, but some refactoring to abstract out these options would be good. If this is a blocker, we can merge (we're blocked on magma/mantle tests anyway). Otherwise, I can work on proposing a not-too-much-work way of doing this. |
I don't think it's a blocker. Adding configurability seems reasonable. The main issue I see is how these configuration options are chosen. Will they be provided in the coreir frontend? (E.g. |
What I'd imagine is something like a |
@rsetaluri this is a little stale now, I propose we just add this as the default behavior and submit configuration options as a a separate PR? I think there's plenty of higher priority issues at the moment. |
I'm fine with that but it requires changes to everyone's verilog expectations (magma/mantle/fault tests) no? Should we stage those so they're not broken for long? |
Yea I will update those test suites |
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