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CPU Emulation

This is a collection of cpu emulators, starting with the very simple SAP-1 computer described in Digital Computer Electronics. The aim is to authentically replicate how a cpu would work if built using TTL logic (and hopefully eventually actually build one).

SAP-1

This is the simplest computer architecture described in Digital Computer Electronics. The cpu only has 16 bytes of memory and only 4 instructions. The only modifications I have made is to add NOP (no operation) and HLT (halt clock) to the instruction set.

image

SAP-1

SAP-1 extended

This cpu design is very similar to the SAP-1, with a few extra control lines and opcodes. The addition of conditional jump instructions (JC - jump on carry, JZ - jump on zero, JNZ - jump on not zero) make this cpu turing complete, meaning it can theoretically do anything any other cpu can. This is (severely) limited in practice by the fact it can only address 16 bytes of memory.

Extra instructions

Instruction Opcode Description
STA 0100 store accumulator in memory
LDI 0100 load immediate value into accumulator
JMP 0100 jump
JC 0100 jump if carry flag is set
JZ 0100 jump if zero flag is set
JNZ 0100 jump if zero flag is not set

SAP-1 extended

SAP-8

This cpu design is again based on the SAP-1 extended with:

  • a full 8-bit address width
  • page bit for addressing ROM and RAM
  • 8 I/O registers
Instruction Opcode Description 2 bytes
NOP 00000 no operation
HLT 00001 halt
LDI 15 00010 load immediate value into accumulator x
LDA [15] 00011 load accumulator from memory x
STA 15 00100 store accumulator in memory x
STM [15] 00101 Store accumulator to memory address x
ADI 15 00110 add immediate to accumulator x
ADD [15] 00111 add memory address to accumulator x
SUI 15 01000 subtract immediate from accumulator x
SUB [15] 01001 subtract memory address from accumulator x
CMI 15 01010 compare immediate to accumulator (set flags) x
CMP [15] 01011 compare memory address to accumulator (set flags) x
JMP 15 10000 jump x
JC 15 10001 jump if carry flag is set x
JZ 15 10010 jump if zero flag is set x
JNZ 15 10011 jump if zero flag is not set x
PAGE0 15 10100 change page and jump x
PAGE1 15 10101 change page and jump x
RESET 10110 reset cpu
OUTA 11000 output accumulator to output A
OUTB 11001 output accumulator to output B
OUTC 11010 output accumulator to output C
OUTD 11011 output accumulator to output D
OUTE 11100 output accumulator to output E
OUTF 11101 output accumulator to output F
INA 11110 input A to accumulator
INB 11111 input B to accumulator

SAP-8

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