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additions to opencmsis to make the clock example run
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chrysn committed Apr 27, 2012
1 parent c9b074a commit dfbb791
Showing 1 changed file with 27 additions and 4 deletions.
31 changes: 27 additions & 4 deletions include/libopencmsis/core_cm3.h
@@ -1,6 +1,9 @@
#ifndef OPENCMSIS_CORECM3_H
#define OPENCMSIS_CORECM3_H

/* needed in various places where we rather should include libopencm3 functionality */
#define MMIO32(addr) (*(volatile uint32_t *)(addr))

/* the original core_cm3.h is nonfree by arm; this provides libopencm3 variant of the symbols efm32lib needs of CMSIS. */
#include <stdint.h>

Expand Down Expand Up @@ -62,9 +65,25 @@ typedef struct

/* stubs for efm32_dma */

#define NVIC_ClearPendingIRQ(irq) 1
#define NVIC_EnableIRQ(irq) 1
#define NVIC_DisableIRQ(irq) 1
/* also used by the clock example. code taken from stm32's nvic.[hc], FIXME until
* the generic cm3 functionality is moved out from stm32 and can be used here
* easily (nvic_clear_pending_irq, nvic_enable_irq, nvic_disable_irq). */
#define NVIC_BASE (SCS_BASE + 0x0100)
#define NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + (iser_id * 4))
#define NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + (icer_id * 4))
#define NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + (icpr_id * 4))
static inline void NVIC_ClearPendingIRQ(uint8_t irqn)
{
NVIC_ICPR(irqn / 32) = (1 << (irqn % 32));
}
static inline void NVIC_EnableIRQ(uint8_t irqn)
{
NVIC_ISER(irqn / 32) = (1 << (irqn % 32));
}
static inline void NVIC_DisableIRQ(uint8_t irqn)
{
NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
}

/* stubs for efm32_int */

Expand Down Expand Up @@ -110,7 +129,6 @@ typedef struct
* and systick_set_clocksource).
* */
#define SYS_TICK_BASE (SCS_BASE + 0x0010)
#define MMIO32(addr) (*(volatile uint32_t *)(addr))
#define STK_LOAD MMIO32(SYS_TICK_BASE + 0x04)
#define STK_CTRL MMIO32(SYS_TICK_BASE + 0x00)
#define STK_CTRL_TICKINT (1 << 1)
Expand Down Expand Up @@ -145,4 +163,9 @@ typedef struct
* vector.c */
#define SysTick_Handler sys_tick_handler

/* likewise, clock.c defines GPIO_ODD_IRQHandler and GPIO_EVEN_IRQHandler */
#define GPIO_ODD_IRQHandler gpio_odd_isr
#define GPIO_EVEN_IRQHandler gpio_even_isr
#define RTC_IRQHandler rtc_isr

#endif

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