Implements a number of 64-bit IMUL instructions. Should resolve issue #…

…43.

mc-sema/cfgToLLVM/x86Instrs_MULDIV.cpp

@@ -372,17 +372,18 @@ static InstTransResult doIMulRRI(InstPtr ip,   BasicBlock      *&b,
     return ContinueBlock;
 }
 
-template <int width>
-static InstTransResult doIMulRMI8(InstPtr ip,  BasicBlock      *&b,
-                            const MCOperand &dst,
-                            Value           *lhs,
-                            const MCOperand &rhs)
+template <int width, int imm_width=8>
+static InstTransResult doIMulRMIn(InstPtr         ip,
+                                  BasicBlock      *&b,
+                                  const MCOperand &dst,
+                                  Value           *lhs,
+                                  const MCOperand &rhs)
 {
     NASSERT(dst.isReg());
     NASSERT(lhs != NULL);
     NASSERT(rhs.isImm());
 
-    Value   *vRhs = CONST_V<8>(b, rhs.getImm());
+    Value   *vRhs = CONST_V<imm_width>(b, rhs.getImm());
     Type    *sx = Type::getIntNTy(b->getContext(), width);
     Value   *vRhs_x = new SExtInst(vRhs, sx, "", b); 
 
@@ -568,6 +569,9 @@ static InstTransResult doDivM(InstPtr ip, BasicBlock *&b, Value *memLoc) {
 GENERIC_TRANSLATION_MEM(IMUL32rm, 
 	doIMulRM<32>(ip,  block, OP(0), OP(1), ADDR(2)),
 	doIMulRM<32>(ip,  block, OP(0), OP(1), STD_GLOBAL_OP(2)))
+GENERIC_TRANSLATION_MEM(IMUL64rm,
+  doIMulRM<64>(ip,  block, OP(0), OP(1), ADDR(2)),
+  doIMulRM<64>(ip,  block, OP(0), OP(1), STD_GLOBAL_OP(2)))
 GENERIC_TRANSLATION_MEM(IMUL16rm, 
 	doIMulRM<16>(ip,  block, OP(0), OP(1), ADDR(2)),
 	doIMulRM<16>(ip,  block, OP(0), OP(1), STD_GLOBAL_OP(2)))
@@ -598,21 +602,24 @@ GENERIC_TRANSLATION_MEM(IMUL32m,
 GENERIC_TRANSLATION(IMUL32rr, doIMulRR<32>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION(IMUL64rr, doIMulRR<64>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION(IMUL64r, doIMulR<64>(ip, block, OP(0)))
+GENERIC_TRANSLATION_MEM(IMUL64m,
+  doIMulM<64>(ip, block, ADDR(0)),
+  doIMulM<64>(ip, block, STD_GLOBAL_OP(0)))
 GENERIC_TRANSLATION(IMUL16rr, doIMulRR<16>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION_MEM(IMUL16rmi, 
 	doIMulRMI<16>(ip, block, OP(0), ADDR(1), OP(6)),
 	doIMulRMI<16>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
 GENERIC_TRANSLATION_MEM(IMUL16rmi8, 
-	doIMulRMI8<16>(ip, block, OP(0), ADDR(1), OP(6)),
-	doIMulRMI8<16>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
+	doIMulRMIn<16>(ip, block, OP(0), ADDR(1), OP(6)),
+	doIMulRMIn<16>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
 GENERIC_TRANSLATION(IMUL16rri, doIMulRRI<16>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION(IMUL16rri8, doIMulRRI<16>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION_MEM(IMUL32rmi, 
 	doIMulRMI<32>(ip, block, OP(0), ADDR(1), OP(6)),
 	doIMulRMI<32>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
 GENERIC_TRANSLATION_MEM(IMUL32rmi8, 
-	doIMulRMI8<32>(ip, block, OP(0), ADDR(1), OP(6)),
-	doIMulRMI8<32>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
+	doIMulRMIn<32>(ip, block, OP(0), ADDR(1), OP(6)),
+	doIMulRMIn<32>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
 GENERIC_TRANSLATION(IMUL32rri, doIMulRRI<32>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION(IMUL32rri8, doIMulRRI<32>(ip, block, OP(0), OP(1), OP(2)))
 GENERIC_TRANSLATION(IMUL64rri8, doIMulRRI<64>(ip, block, OP(0), OP(1), OP(2)))
@@ -622,9 +629,21 @@ GENERIC_TRANSLATION(IDIV8r, doIDivR<8>(ip, block, OP(0)))
 GENERIC_TRANSLATION(IDIV16r, doIDivR<16>(ip, block, OP(0)))
 GENERIC_TRANSLATION(IDIV32r, doIDivR<32>(ip, block, OP(0)))
 GENERIC_TRANSLATION(IDIV64r, doIDivR<64>(ip, block, OP(0)))
+
+
+GENERIC_TRANSLATION_MEM(IMUL64rmi8,
+  doIMulRMIn<64>(ip, block, OP(0), ADDR(1), OP(6)),
+  doIMulRMIn<64>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6)))
+
+
+GENERIC_TRANSLATION_MEM(IMUL64rmi32,
+  (doIMulRMIn<64, 32>(ip, block, OP(0), ADDR(1), OP(6))),
+  (doIMulRMIn<64, 32>(ip, block, OP(0), STD_GLOBAL_OP(1), OP(6))))
+
 GENERIC_TRANSLATION_MEM(IDIV8m, 
 	doIDivM<8>(ip,    block, ADDR(0)),
 	doIDivM<8>(ip,    block, STD_GLOBAL_OP(0)))
+
 GENERIC_TRANSLATION_MEM(IDIV16m, 
 	doIDivM<16>(ip,   block, ADDR(0)),
 	doIDivM<16>(ip,   block, STD_GLOBAL_OP(0)))
@@ -654,34 +673,43 @@ GENERIC_TRANSLATION_MEM(DIV64m,
 
 void MULDIV_populateDispatchMap(DispatchMap &m) {
 
-    m[X86::IMUL32rm] = translate_IMUL32rm;
-    m[X86::IMUL16rm] = translate_IMUL16rm;
-    m[X86::IMUL8r] = translate_IMUL8r;
-    m[X86::IMUL8m] = translate_IMUL8m;
-    m[X86::IMUL16r] = translate_IMUL16r;
-    m[X86::IMUL16m] = translate_IMUL16m;
+    m[X86::MUL8r] = translate_MUL8r;
+    m[X86::MUL8m] = translate_MUL8m;
+
     m[X86::MUL32r] = translate_MUL32r;
     m[X86::MUL32m] = translate_MUL32m;
     m[X86::MUL16r] = translate_MUL16r;
     m[X86::MUL16m] = translate_MUL16m;
-    m[X86::MUL8r] = translate_MUL8r;
-    m[X86::MUL8m] = translate_MUL8m;
-    m[X86::IMUL32r] = translate_IMUL32r;
-    m[X86::IMUL32m] = translate_IMUL32m;
-    m[X86::IMUL32rr] = translate_IMUL32rr;
+
+    m[X86::IMUL8r] = translate_IMUL8r;
+    m[X86::IMUL8m] = translate_IMUL8m;
+
+    m[X86::IMUL16r] = translate_IMUL16r;
+    m[X86::IMUL16m] = translate_IMUL16m;
     m[X86::IMUL16rr] = translate_IMUL16rr;
     m[X86::IMUL16rmi] = translate_IMUL16rmi;
     m[X86::IMUL16rmi8] = translate_IMUL16rmi8;
     m[X86::IMUL16rri] = translate_IMUL16rri;
     m[X86::IMUL16rri8] = translate_IMUL16rri8;
+
+    m[X86::IMUL32r] = translate_IMUL32r;
+    m[X86::IMUL32m] = translate_IMUL32m;
+    m[X86::IMUL32rr] = translate_IMUL32rr;
+    m[X86::IMUL32rm] = translate_IMUL32rm;
+    m[X86::IMUL16rm] = translate_IMUL16rm;
     m[X86::IMUL32rmi] = translate_IMUL32rmi;
     m[X86::IMUL32rmi8] = translate_IMUL32rmi8;
     m[X86::IMUL32rri] = translate_IMUL32rri;
     m[X86::IMUL32rri8] = translate_IMUL32rri8;
-    m[X86::IMUL64rri8] = translate_IMUL64rri8;
-    m[X86::IMUL64rri32] = translate_IMUL64rri32;
-    m[X86::IMUL64rr] = translate_IMUL64rr;
+
+    m[X86::IMUL64m] = translate_IMUL64m;
     m[X86::IMUL64r] = translate_IMUL64r;
+    m[X86::IMUL64rm] = translate_IMUL64rm;
+    m[X86::IMUL64rmi32] = nullptr;
+    m[X86::IMUL64rmi8] = translate_IMUL64rmi8;
+    m[X86::IMUL64rr] = translate_IMUL64rr;
+    m[X86::IMUL64rri32] = translate_IMUL64rri32;
+    m[X86::IMUL64rri8] = translate_IMUL64rri8;
 
     m[X86::IDIV8r] = translate_IDIV8r;
     m[X86::IDIV16r] = translate_IDIV16r;

mc-sema/validator/x86_64/tests/IMUL64m.asm

@@ -0,0 +1,14 @@
+BITS 64
+;TEST_FILE_META_BEGIN
+;TEST_TYPE=TEST_F
+;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
+;TEST_FILE_META_END
+    ; IMUL64m
+    mov rax, 0x323
+    mov rbx, 0xbbbbbbbb
+    push rbx
+    pop rbx
+    ;TEST_BEGIN_RECORDING
+    imul rax, [rsp - 8]
+    ;TEST_END_RECORDING
+

mc-sema/validator/x86_64/tests/IMUL64r.asm

@@ -0,0 +1,12 @@
+BITS 64
+;TEST_FILE_META_BEGIN
+;TEST_TYPE=TEST_F
+;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
+;TEST_FILE_META_END
+    ; IMUL64r
+    mov rax, 0x323
+    mov rbx, 0xbbbbbbbb
+    ;TEST_BEGIN_RECORDING
+    imul ebx
+    ;TEST_END_RECORDING
+

mc-sema/validator/x86_64/tests/IMUL64rr.asm

@@ -0,0 +1,12 @@
+BITS 64
+;TEST_FILE_META_BEGIN
+;TEST_TYPE=TEST_F
+;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
+;TEST_FILE_META_END
+    ; IMUL64rr
+    mov ebx, 0x20000
+    mov ecx, 0x34
+    ;TEST_BEGIN_RECORDING
+    imul ebx, ecx
+    ;TEST_END_RECORDING
+

mc-sema/validator/x86_64/tests/IMUL64rri32.asm

@@ -0,0 +1,12 @@
+BITS 64
+;TEST_FILE_META_BEGIN
+;TEST_TYPE=TEST_F
+;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
+;TEST_FILE_META_END
+    ; IMUL64rri32
+    mov ebx, 0x20000
+    mov ecx, 0x34343434
+    ;TEST_BEGIN_RECORDING
+    imul ebx, ecx, 0xbbbbb
+    ;TEST_END_RECORDING
+

mc-sema/validator/x86_64/tests/IMUL64rri8.asm

@@ -0,0 +1,12 @@
+BITS 64
+;TEST_FILE_META_BEGIN
+;TEST_TYPE=TEST_F
+;TEST_IGNOREFLAGS=FLAG_SF|FLAG_ZF|FLAG_AF|FLAG_PF
+;TEST_FILE_META_END
+    ; IMUL64rri8
+    mov ebx, 0x20000
+    mov ecx, 0x34343434
+    ;TEST_BEGIN_RECORDING
+    imul ebx, ecx, 0xb
+    ;TEST_END_RECORDING
+