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db: fix the issue of failed to init pci root bus
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dragonball reserves 2048G of mmio space for the pci root bus by default
on physical addresses greater than 4G. However, for some machines with
smaller physical address widths, such as 39-bit wide physical addresses,
dragonball reserves the mmio space when initializing the memory. It is
less than 2048G, so this commit dynamically calculates and allocates the
mmio size of each pci root bus.

Fixes: kata-containers#9509

Signed-off-by: Fupan Li <fupan.lfp@antgroup.com>
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Fupan Li committed May 6, 2024
1 parent e5e0983 commit 26bee78
Showing 1 changed file with 12 additions and 1 deletion.
13 changes: 12 additions & 1 deletion src/dragonball/src/device_manager/vfio_dev_mgr/pci_vfio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@

use std::sync::Arc;

use dbs_boot::layout::{GUEST_MEM_END, GUEST_PHYS_END};
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
use dbs_device::resources::Resource;
use dbs_device::resources::{DeviceResources, ResourceConstraint};
Expand All @@ -19,6 +20,8 @@ use crate::resource_manager::ResourceManager;

/// we only support one pci bus
pub const PCI_BUS_DEFAULT: u8 = 0;
/// The default mmio size for pci root bus.
const PCI_MMIO_DEFAULT_SIZE: u64 = 2048u64 << 30;

/// PCI pass-through device manager.
#[derive(Clone)]
Expand Down Expand Up @@ -117,7 +120,7 @@ impl PciSystemManager {
requests.push(ResourceConstraint::MmioAddress {
range: Some((0x1_0000_0000, 0xffff_ffff_ffff_ffff)),
align: 4096,
size: 2048u64 << 30,
size: Self::get_mmio_size(),
});
// allocate 8KB IO port
requests.push(ResourceConstraint::PioAddress {
Expand All @@ -129,6 +132,14 @@ impl PciSystemManager {
requests
}

fn get_mmio_size() -> u64 {
if (*GUEST_PHYS_END - *GUEST_MEM_END) > PCI_MMIO_DEFAULT_SIZE {
PCI_MMIO_DEFAULT_SIZE
} else {
(*GUEST_PHYS_END - *GUEST_MEM_END) / 2
}
}

/// Get the PCI root bus.
pub fn pci_root_bus(&self) -> Arc<PciBus> {
self.pci_root_bus.clone()
Expand Down

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