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dr_action.c
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dr_action.c
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/*
* Copyright (c) 2019, Mellanox Technologies. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#include <unistd.h>
#include <arpa/inet.h>
#include <ccan/ilog.h>
#include "mlx5dv_dr.h"
#include "dr_ste.h"
enum dr_action_domain {
DR_ACTION_DOMAIN_NIC_INGRESS,
DR_ACTION_DOMAIN_NIC_EGRESS,
DR_ACTION_DOMAIN_FDB_INGRESS,
DR_ACTION_DOMAIN_FDB_EGRESS,
DR_ACTION_DOMAIN_MAX,
};
enum dr_action_valid_state {
DR_ACTION_STATE_ERR,
DR_ACTION_STATE_NO_ACTION,
DR_ACTION_STATE_ENCAP,
DR_ACTION_STATE_DECAP,
DR_ACTION_STATE_MODIFY_HDR,
DR_ACTION_STATE_POP_VLAN,
DR_ACTION_STATE_PUSH_VLAN,
DR_ACTION_STATE_NON_TERM,
DR_ACTION_STATE_TERM,
DR_ACTION_STATE_ASO,
DR_ACTION_STATE_MAX,
};
static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_STATE_MAX]
[DR_ACTION_TYP_MAX] = {
[DR_ACTION_DOMAIN_NIC_INGRESS] = {
[DR_ACTION_STATE_NO_ACTION] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_DECAP] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_TERM] = {
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
},
},
[DR_ACTION_DOMAIN_NIC_EGRESS] = {
[DR_ACTION_STATE_NO_ACTION] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_TERM] = {
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
},
},
[DR_ACTION_DOMAIN_FDB_INGRESS] = {
[DR_ACTION_STATE_NO_ACTION] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_DECAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_TERM] = {
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
},
},
[DR_ACTION_DOMAIN_FDB_EGRESS] = {
[DR_ACTION_STATE_NO_ACTION] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_NON_TERM,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ROOT_FT] = DR_ACTION_STATE_TERM,
},
[DR_ACTION_STATE_TERM] = {
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
},
},
};
static enum mlx5dv_flow_action_packet_reformat_type
dr_action_type_to_reformat_enum(enum dr_action_type action_type)
{
switch (action_type) {
case DR_ACTION_TYP_TNL_L2_TO_L2:
return MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2;
case DR_ACTION_TYP_L2_TO_TNL_L2:
return MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL;
case DR_ACTION_TYP_TNL_L3_TO_L2:
return MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
case DR_ACTION_TYP_L2_TO_TNL_L3:
return MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
default:
assert(false);
return 0;
}
}
static enum dr_action_type
dr_action_reformat_to_action_type(enum mlx5dv_flow_action_packet_reformat_type type)
{
switch (type) {
case MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2:
return DR_ACTION_TYP_TNL_L2_TO_L2;
case MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL:
return DR_ACTION_TYP_L2_TO_TNL_L2;
case MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2:
return DR_ACTION_TYP_TNL_L3_TO_L2;
case MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL:
return DR_ACTION_TYP_L2_TO_TNL_L3;
default:
assert(false);
return 0;
}
}
/* Apply the actions on the rule STE array starting from the last_ste.
* Actions might require more than one STE, new_num_stes will return
* the new size of the STEs array, rule with actions. */
static void dr_actions_apply(struct mlx5dv_dr_domain *dmn,
enum dr_domain_nic_type nic_type,
uint8_t *action_type_set,
uint8_t *last_ste,
struct dr_ste_actions_attr *attr,
uint32_t *new_num_stes)
{
struct dr_ste_ctx *ste_ctx = dmn->ste_ctx;
uint32_t added_stes = 0;
if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
dr_ste_set_actions_rx(ste_ctx, action_type_set,
last_ste, attr, &added_stes);
else
dr_ste_set_actions_tx(ste_ctx, action_type_set,
last_ste, attr, &added_stes);
*new_num_stes += added_stes;
}
static enum dr_action_domain
dr_action_get_action_domain(enum mlx5dv_dr_domain_type domain,
enum dr_domain_nic_type nic_type)
{
if (domain == MLX5DV_DR_DOMAIN_TYPE_NIC_RX) {
return DR_ACTION_DOMAIN_NIC_INGRESS;
} else if (domain == MLX5DV_DR_DOMAIN_TYPE_NIC_TX) {
return DR_ACTION_DOMAIN_NIC_EGRESS;
} else {
/* FDB domain */
if (nic_type == DR_DOMAIN_NIC_TYPE_RX)
return DR_ACTION_DOMAIN_FDB_INGRESS;
else
return DR_ACTION_DOMAIN_FDB_EGRESS;
}
}
static int
dr_action_validate_and_get_next_state(enum dr_action_domain action_domain,
uint32_t action_type,
uint32_t *state)
{
uint32_t cur_state = *state;
/* Check action state machine is valid */
*state = next_action_state[action_domain][cur_state][action_type];
if (*state == DR_ACTION_STATE_ERR) {
errno = EOPNOTSUPP;
return errno;
}
return 0;
}
#define WITH_VLAN_NUM_HW_ACTIONS 6
int dr_actions_build_ste_arr(struct mlx5dv_dr_matcher *matcher,
struct dr_matcher_rx_tx *nic_matcher,
struct mlx5dv_dr_action *actions[],
uint32_t num_actions,
uint8_t *ste_arr,
uint32_t *new_hw_ste_arr_sz,
struct cross_dmn_params *cross_dmn_p)
{
struct dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn;
bool rx_rule = nic_dmn->type == DR_DOMAIN_NIC_TYPE_RX;
struct mlx5dv_dr_action *cross_dmn_action = NULL;
struct mlx5dv_dr_domain *dmn = matcher->tbl->dmn;
uint8_t action_type_set[DR_ACTION_TYP_MAX] = {};
uint32_t state = DR_ACTION_STATE_NO_ACTION;
struct dr_ste_actions_attr attr = {};
enum dr_action_domain action_domain;
uint8_t *last_ste;
int i;
attr.gvmi = dmn->info.caps.gvmi;
attr.hit_gvmi = dmn->info.caps.gvmi;
attr.final_icm_addr = nic_dmn->default_icm_addr;
action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->type);
attr.aso_ste_loc = -1;
for (i = 0; i < num_actions; i++) {
struct mlx5dv_dr_action *action;
int max_actions_type = 1;
uint32_t action_type;
action = actions[i];
action_type = action->action_type;
switch (action_type) {
case DR_ACTION_TYP_DROP:
attr.final_icm_addr = nic_dmn->drop_icm_addr;
attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
break;
case DR_ACTION_TYP_FT:
{
struct mlx5dv_dr_table *dest_tbl = action->dest_tbl;
if (dest_tbl->dmn != dmn) {
dr_dbg(dmn, "Destination table belongs to a different domain\n");
goto out_invalid_arg;
}
if (dest_tbl->level <= matcher->tbl->level) {
dr_dbg(dmn, "Destination table level should be higher than source table\n");
goto out_invalid_arg;
}
attr.final_icm_addr = rx_rule ?
dr_icm_pool_get_chunk_icm_addr(dest_tbl->rx.s_anchor->chunk) :
dr_icm_pool_get_chunk_icm_addr(dest_tbl->tx.s_anchor->chunk);
break;
}
case DR_ACTION_TYP_ROOT_FT:
if (action->root_tbl.tbl->dmn != dmn) {
dr_dbg(dmn, "Destination anchor belongs to a different domain\n");
goto out_invalid_arg;
}
attr.final_icm_addr = rx_rule ?
action->root_tbl.rx_icm_addr :
action->root_tbl.tx_icm_addr;
break;
case DR_ACTION_TYP_QP:
if (action->dest_qp.is_qp)
attr.final_icm_addr = to_mqp(action->dest_qp.qp)->tir_icm_addr;
else
attr.final_icm_addr = action->dest_qp.devx_tir->rx_icm_addr;
if (!attr.final_icm_addr) {
dr_dbg(dmn, "Unsupported TIR/QP for action\n");
goto out_invalid_arg;
}
break;
case DR_ACTION_TYP_CTR:
attr.ctr_id = action->ctr.devx_obj->object_id +
action->ctr.offset;
break;
case DR_ACTION_TYP_ASO_CT:
if (dmn != action->aso.dmn) {
if (!action->aso.devx_obj->priv) {
dr_dbg(dmn, "ASO CT devx priv object is not initialized\n");
goto out_invalid_arg;
}
struct dr_aso_cross_dmn_arrays *cross_dmn_arrays =
(struct dr_aso_cross_dmn_arrays *) action->aso.devx_obj->priv;
if (atomic_fetch_add(&cross_dmn_arrays->rule_htbl[action->aso.offset]->ste_arr->refcount, 1) > 1) {
dr_dbg(dmn, "ASO CT cross GVMI action is in use by another rule\n");
atomic_fetch_sub(&cross_dmn_arrays->rule_htbl[action->aso.offset]->ste_arr->refcount, 1);
errno = EBUSY;
goto out_errno;
}
dr_ste_get(cross_dmn_arrays->action_htbl[action->aso.offset]->ste_arr);
cross_dmn_p->cross_dmn_action = action;
cross_dmn_action = action;
}
attr.aso = &action->aso;
break;
case DR_ACTION_TYP_ASO_FLOW_METER:
case DR_ACTION_TYP_ASO_FIRST_HIT:
if (dmn->ctx != action->aso.devx_obj->context) {
dr_dbg(dmn, "ASO belongs to a different IB ctx\n");
goto out_invalid_arg;
}
attr.aso = &action->aso;
break;
case DR_ACTION_TYP_TAG:
attr.flow_tag = action->flow_tag;
break;
case DR_ACTION_TYP_MISS:
case DR_ACTION_TYP_TNL_L2_TO_L2:
break;
case DR_ACTION_TYP_TNL_L3_TO_L2:
if (action->rewrite.is_root_level) {
dr_dbg(dmn, "Root decap L3 action cannot be used on current table\n");
goto out_invalid_arg;
}
if (action->rewrite.ptrn_arg.ptrn && action->rewrite.ptrn_arg.arg) {
attr.decap_index =
dr_arg_get_object_id(action->rewrite.ptrn_arg.arg);
attr.decap_actions =
action->rewrite.ptrn_arg.ptrn->rewrite_param.num_of_actions;
attr.decap_pat_idx =
action->rewrite.ptrn_arg.ptrn->rewrite_param.index;
} else {
attr.decap_index = action->rewrite.param.index;
attr.decap_actions = action->rewrite.param.num_of_actions;
attr.decap_with_vlan =
attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS;
attr.decap_pat_idx = DR_INVALID_PATTERN_INDEX;
}
break;
case DR_ACTION_TYP_MODIFY_HDR:
if (action->rewrite.is_root_level) {
dr_dbg(dmn, "Root modify header action cannot be used on current table\n");
goto out_invalid_arg;
}
if (action->rewrite.single_action_opt) {
attr.modify_actions = action->rewrite.param.num_of_actions;
attr.single_modify_action = action->rewrite.param.data;
} else {
if (action->rewrite.ptrn_arg.ptrn && action->rewrite.ptrn_arg.arg) {
attr.modify_index =
dr_arg_get_object_id(action->rewrite.ptrn_arg.arg);
attr.modify_pat_idx =
action->rewrite.ptrn_arg.ptrn->rewrite_param.index;
attr.modify_actions =
action->rewrite.ptrn_arg.ptrn->rewrite_param.
num_of_actions;
} else {
attr.modify_actions = action->rewrite.param.num_of_actions;
attr.modify_index = action->rewrite.param.index;
attr.modify_pat_idx = DR_INVALID_PATTERN_INDEX;
}
}
break;
case DR_ACTION_TYP_L2_TO_TNL_L2:
case DR_ACTION_TYP_L2_TO_TNL_L3:
if (action->reformat.is_root_level) {
dr_dbg(dmn, "Root encap action cannot be used on current table\n");
goto out_invalid_arg;
}
if (rx_rule &&
!(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
dr_dbg(dmn, "Device doesn't support Encap on RX\n");
goto out_invalid_arg;
}
attr.reformat_size = action->reformat.reformat_size;
attr.reformat_id = action->reformat.dvo->object_id;
attr.prio_tag_required = dmn->info.caps.prio_tag_required;
break;
case DR_ACTION_TYP_METER:
if (action->meter.next_ft->dmn != dmn) {
dr_dbg(dmn, "Next table belongs to a different domain\n");
goto out_invalid_arg;
}
if (action->meter.next_ft->level <=
matcher->tbl->level) {
dr_dbg(dmn, "Next table level should he higher than source table\n");
goto out_invalid_arg;
}
attr.final_icm_addr = rx_rule ?
action->meter.rx_icm_addr :
action->meter.tx_icm_addr;
break;
case DR_ACTION_TYP_SAMPLER:
if (action->sampler.dmn != dmn) {
dr_dbg(dmn, "Sampler belongs to a different domain\n");
goto out_invalid_arg;
}
if (action->sampler.sampler_default->next_ft->level <=
matcher->tbl->level) {
dr_dbg(dmn, "Sampler next table level should he higher than source table\n");
goto out_invalid_arg;
}
if (rx_rule) {
attr.final_icm_addr = action->sampler.sampler_default->rx_icm_addr;
} else {
attr.final_icm_addr = (action->sampler.sampler_restore) ?
action->sampler.sampler_restore->tx_icm_addr :
action->sampler.sampler_default->tx_icm_addr;
}
break;
case DR_ACTION_TYP_VPORT:
if (action->vport.dmn != dmn) {
dr_dbg(dmn, "Destination vport belongs to a different domain\n");
goto out_invalid_arg;
}
if (unlikely(rx_rule && action->vport.caps->num == WIRE_PORT)) {
if (dmn->type == MLX5DV_DR_DOMAIN_TYPE_NIC_RX) {
dr_dbg(dmn, "Forwarding to uplink vport on RX is not allowed\n");
goto out_invalid_arg;
}
/* silently drop the packets for RX side of FDB */
attr.final_icm_addr = nic_dmn->drop_icm_addr;
attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
} else {
attr.hit_gvmi = action->vport.caps->vhca_gvmi;
attr.final_icm_addr = rx_rule ?
action->vport.caps->icm_address_rx :
action->vport.caps->icm_address_tx;
}
break;
case DR_ACTION_TYP_DEST_ARRAY:
if (action->dest_array.dmn != dmn) {
dr_dbg(dmn, "Destination array belongs to a different domain\n");
goto out_invalid_arg;
}
attr.final_icm_addr = rx_rule ?
action->dest_array.rx_icm_addr :
action->dest_array.tx_icm_addr;
break;
case DR_ACTION_TYP_POP_VLAN:
if (!rx_rule && !(dmn->ste_ctx->actions_caps &
DR_STE_CTX_ACTION_CAP_TX_POP)) {
dr_dbg(dmn, "Device doesn't support POP VLAN action on TX\n");
goto out_invalid_arg;
}
max_actions_type = MAX_VLANS;
attr.vlans.count_pop++;
break;
case DR_ACTION_TYP_PUSH_VLAN:
if (rx_rule && !(dmn->ste_ctx->actions_caps &
DR_STE_CTX_ACTION_CAP_RX_PUSH)) {
dr_dbg(dmn, "Device doesn't support PUSH VLAN action on RX\n");
goto out_invalid_arg;
}
max_actions_type = MAX_VLANS;
if (attr.vlans.count_push == MAX_VLANS) {
errno = ENOTSUP;
return ENOTSUP;
}
attr.vlans.headers[attr.vlans.count_push++] = action->push_vlan.vlan_hdr;
break;
default:
goto out_invalid_arg;
}
/* Check action duplication */
if (++action_type_set[action_type] > max_actions_type) {
dr_dbg(dmn, "Action type %d supports only max %d time(s)\n",
action_type, max_actions_type);
goto out_invalid_arg;
}
/* Check action state machine is valid */
if (dr_action_validate_and_get_next_state(action_domain,
action_type,
&state)) {
dr_dbg(dmn, "Invalid action sequence provided\n");
goto out_errno;
}
}
*new_hw_ste_arr_sz = nic_matcher->num_of_builders;
last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1);
dr_actions_apply(dmn,
nic_dmn->type,
action_type_set,
last_ste,
&attr,
new_hw_ste_arr_sz);
if (attr.aso_ste_loc != -1)
cross_dmn_p->cross_dmn_loc = attr.aso_ste_loc;
return 0;
out_invalid_arg:
errno = EINVAL;
out_errno:
if (cross_dmn_action) {
struct dr_aso_cross_dmn_arrays *cross_dmn_arrays = (struct dr_aso_cross_dmn_arrays *) cross_dmn_action->aso.devx_obj->priv;
atomic_fetch_sub(&cross_dmn_arrays->rule_htbl[cross_dmn_action->aso.offset]->ste_arr->refcount, 1);
atomic_fetch_sub(&cross_dmn_arrays->action_htbl[cross_dmn_action->aso.offset]->ste_arr->refcount, 1);
}
return errno;
}
int dr_actions_build_attr(struct mlx5dv_dr_matcher *matcher,
struct mlx5dv_dr_action *actions[],
size_t num_actions,
struct mlx5dv_flow_action_attr *attr,
struct mlx5_flow_action_attr_aux *attr_aux)
{
struct mlx5dv_dr_domain *dmn = matcher->tbl->dmn;
int i;
for (i = 0; i < num_actions; i++) {
switch (actions[i]->action_type) {
case DR_ACTION_TYP_FT:
if (actions[i]->dest_tbl->dmn != dmn) {
dr_dbg(dmn, "Destination table belongs to a different domain\n");
errno = EINVAL;
return errno;
}
attr[i].type = MLX5DV_FLOW_ACTION_DEST_DEVX;
attr[i].obj = actions[i]->dest_tbl->devx_obj;
break;
case DR_ACTION_TYP_DEST_ARRAY:
if (actions[i]->dest_array.dmn != dmn) {
dr_dbg(dmn, "Destination array belongs to a different domain\n");
errno = EINVAL;
return errno;
}
attr[i].type = MLX5DV_FLOW_ACTION_DEST_DEVX;
attr[i].obj = actions[i]->dest_array.devx_tbl->ft_dvo;
break;
case DR_ACTION_TYP_TNL_L2_TO_L2:
case DR_ACTION_TYP_L2_TO_TNL_L2:
case DR_ACTION_TYP_TNL_L3_TO_L2:
case DR_ACTION_TYP_L2_TO_TNL_L3:
attr[i].type = MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION;
attr[i].action = actions[i]->reformat.flow_action;
break;
case DR_ACTION_TYP_MODIFY_HDR:
attr[i].type = MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION;
attr[i].action = actions[i]->rewrite.flow_action;
break;
case DR_ACTION_TYP_QP:
if (actions[i]->dest_qp.is_qp) {
attr[i].type = MLX5DV_FLOW_ACTION_DEST_IBV_QP;
attr[i].qp = actions[i]->dest_qp.qp;
} else {
attr[i].type = MLX5DV_FLOW_ACTION_DEST_DEVX;
attr[i].obj = actions[i]->dest_qp.devx_tir;
}
break;
case DR_ACTION_TYP_CTR:
attr[i].type = MLX5DV_FLOW_ACTION_COUNTERS_DEVX;
attr[i].obj = actions[i]->ctr.devx_obj;
if (actions[i]->ctr.offset) {
attr_aux[i].type = MLX5_FLOW_ACTION_COUNTER_OFFSET;
attr_aux[i].offset = actions[i]->ctr.offset;
}
break;