riscv: perf: Add support for Control Transfer Records Ext.

[bjoto]

Pull request for series with
subject: riscv: perf: Add support for Control Transfer Records Ext.
version: 1
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=857112

[bjoto]

Upstream branch: 1613e60
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=857112
version: 1

Pull request is NOT updated. Failed to apply https://patchwork.kernel.org/project/linux-riscv/list/?series=857112
error message:

Cmd('git') failed due to: exit code(128)
  cmdline: git am -s --3way
  stdout: 'Applying: perf: Increase the maximum number of samples to 256.
Applying: riscv: perf: Add Control transfer records CSR definations.
Patch failed at 0002 riscv: perf: Add Control transfer records CSR definations.
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".'
  stderr: 'error: sha1 information is lacking or useless (arch/riscv/include/asm/csr.h).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch'

conflict:

[bjoto]

At least one diff in series https://patchwork.kernel.org/project/linux-riscv/list/?series=857112 expired. Closing PR.