Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

RISC-V SBI debug console extension support #121

Closed
wants to merge 8 commits into from
Closed

RISC-V SBI debug console extension support #121

wants to merge 8 commits into from

Commits on Oct 17, 2023

  1. RISC-V: Add defines for SBI debug console extension 

    We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    a9b9413 View commit details
    Browse the repository at this point in the history

  2. RISC-V: KVM: Change the SBI specification version to v2.0 

    We will be implementing SBI DBCN extension for KVM RISC-V so let
us change the KVM RISC-V SBI specification version to v2.0.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    eb2e700 View commit details
    Browse the repository at this point in the history

  3. RISC-V: KVM: Allow some SBI extensions to be disabled by default 

    Currently, all SBI extensions are enabled by default which is
problematic for SBI extensions (such as DBCN) which are forwarded
to the KVM user-space because we might have an older KVM user-space
which is not aware/ready to handle newer SBI extensions. Ideally,
the SBI extensions forwarded to the KVM user-space must be
disabled by default.

To address above, we allow certain SBI extensions to be disabled
by default so that KVM user-space must explicitly enable such
SBI extensions to receive forwarded calls from Guest VCPU.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    c89a6a6 View commit details
    Browse the repository at this point in the history

  4. RISC-V: KVM: Forward SBI DBCN extension to user-space 

    The frozen SBI v2.0 specification defines the SBI debug console
(DBCN) extension which replaces the legacy SBI v0.1 console
functions namely sbi_console_getchar() and sbi_console_putchar().

The SBI DBCN extension needs to be emulated in the KVM user-space
(i.e. QEMU-KVM or KVMTOOL) so we forward SBI DBCN calls from KVM
guest to the KVM user-space which can then redirect the console
input/output to wherever it wants (e.g. telnet, file, stdio, etc).

The SBI debug console is simply a early console available to KVM
guest for early prints and it does not intend to replace the proper
console devices such as 8250, VirtIO console, etc.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    73a17f0 View commit details
    Browse the repository at this point in the history

  5. RISC-V: Add inline version of sbi_console_putchar/getchar() functions 

    The functions sbi_console_putchar() and sbi_console_getchar() are
not defined when CONFIG_RISCV_SBI_V01 is disabled so let us add
inline version of these functions to avoid "#ifdef" on user side.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    1b572e6 View commit details
    Browse the repository at this point in the history

  6. tty/serial: Add RISC-V SBI debug console based earlycon 

    We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    ad894da View commit details
    Browse the repository at this point in the history

  7. tty: Add SBI debug console support to HVC SBI driver 

    RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.

Extend the HVC SBI driver to support it.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @atishp04
    atishp04 authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    71a50f6 View commit details
    Browse the repository at this point in the history

  8. RISC-V: Enable SBI based earlycon support 

    Let us enable SBI based earlycon support in defconfigs for both RV32
and RV64 so that "earlycon=sbi" can be used again.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
    @avpatel
    avpatel authored and Björn Töpel committed Oct 17, 2023
    Configuration menu
    Copy the full SHA
    386c1b2 View commit details
    Browse the repository at this point in the history