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RISC-V: provide some accelerated cryptography implementations using vector extensions #172

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@bjoto bjoto commented Oct 25, 2023

Pull request for series with
subject: RISC-V: provide some accelerated cryptography implementations using vector extensions
version: 1
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=796538

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bjoto commented Oct 25, 2023

Upstream branch: 3fec323
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=796538
version: 1

Pull request is NOT updated. Failed to apply https://patchwork.kernel.org/project/linux-riscv/list/?series=796538
error message:

Cmd('git') failed due to: exit code(128)
  cmdline: git am -s --3way
  stdout: 'Applying: RISC-V: add helper function to read the vector VLEN
Using index info to reconstruct a base tree...
M	arch/riscv/include/asm/vector.h
Falling back to patching base and 3-way merge...
Auto-merging arch/riscv/include/asm/vector.h
CONFLICT (content): Merge conflict in arch/riscv/include/asm/vector.h
Patch failed at 0001 RISC-V: add helper function to read the vector VLEN
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".'
  stderr: 'error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch'

conflict:

diff --cc arch/riscv/include/asm/vector.h
index c5ee07b3df07,1fd3e5510b64..000000000000
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@@ -216,4 -238,21 +216,24 @@@ static inline bool riscv_v_vstate_ctrl_
  
  #endif /* CONFIG_RISCV_ISA_V */
  
++<<<<<<< HEAD
++=======
+ #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE
+ void kernel_vector_allow_preemption(void);
+ #else
+ #define kernel_vector_allow_preemption()	do {} while (0)
+ #endif
+ 
+ /*
+  * Return the implementation's vlen value.
+  *
+  * riscv_v_vsize contains the value of "32 vector registers with vlenb length"
+  * so rebuild the vlen value in bits from it.
+  */
+ static inline int riscv_vector_vlen(void)
+ {
+ 	return riscv_v_vsize / 32 * 8;
+ }
+ 
++>>>>>>> RISC-V: add helper function to read the vector VLEN
  #endif /* ! __ASM_RISCV_VECTOR_H */

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bjoto commented Nov 22, 2023

At least one diff in series https://patchwork.kernel.org/project/linux-riscv/list/?series=796538 expired. Closing PR.

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bjoto commented Nov 27, 2023

Upstream branch: 3ca112b
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=804412
version: 2

Pull request is NOT updated. Failed to apply https://patchwork.kernel.org/project/linux-riscv/list/?series=804412
error message:

Cmd('git') failed due to: exit code(128)
  cmdline: git am -s --3way
  stdout: 'Applying: RISC-V: add helper function to read the vector VLEN
Using index info to reconstruct a base tree...
M	arch/riscv/include/asm/vector.h
Falling back to patching base and 3-way merge...
Auto-merging arch/riscv/include/asm/vector.h
CONFLICT (content): Merge conflict in arch/riscv/include/asm/vector.h
Patch failed at 0001 RISC-V: add helper function to read the vector VLEN
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".'
  stderr: 'error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch'

conflict:

diff --cc arch/riscv/include/asm/vector.h
index 87aaef656257,1fd3e5510b64..000000000000
--- a/arch/riscv/include/asm/vector.h
+++ b/arch/riscv/include/asm/vector.h
@@@ -216,4 -238,21 +216,24 @@@ static inline bool riscv_v_vstate_ctrl_
  
  #endif /* CONFIG_RISCV_ISA_V */
  
++<<<<<<< HEAD
++=======
+ #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE
+ void kernel_vector_allow_preemption(void);
+ #else
+ #define kernel_vector_allow_preemption()	do {} while (0)
+ #endif
+ 
+ /*
+  * Return the implementation's vlen value.
+  *
+  * riscv_v_vsize contains the value of "32 vector registers with vlenb length"
+  * so rebuild the vlen value in bits from it.
+  */
+ static inline int riscv_vector_vlen(void)
+ {
+ 	return riscv_v_vsize / 32 * 8;
+ }
+ 
++>>>>>>> RISC-V: add helper function to read the vector VLEN
  #endif /* ! __ASM_RISCV_VECTOR_H */

@bjoto bjoto added V3 and removed V2 labels Dec 5, 2023
@bjoto bjoto force-pushed the fixes_base branch 3 times, most recently from 31bea4c to 26966d3 Compare December 8, 2023 16:12
@bjoto bjoto closed this Dec 31, 2023
@bjoto bjoto deleted the series/796538=>fixes branch January 4, 2024 13:17
bjoto pushed a commit that referenced this pull request May 17, 2024
Recent additions in BPF like cpu v4 instructions, test_bpf module
exhibits the following failures:

  test_bpf: #82 ALU_MOVSX | BPF_B jited:1 ret 2 != 1 (0x2 != 0x1)FAIL (1 times)
  test_bpf: #83 ALU_MOVSX | BPF_H jited:1 ret 2 != 1 (0x2 != 0x1)FAIL (1 times)
  test_bpf: #84 ALU64_MOVSX | BPF_B jited:1 ret 2 != 1 (0x2 != 0x1)FAIL (1 times)
  test_bpf: #85 ALU64_MOVSX | BPF_H jited:1 ret 2 != 1 (0x2 != 0x1)FAIL (1 times)
  test_bpf: #86 ALU64_MOVSX | BPF_W jited:1 ret 2 != 1 (0x2 != 0x1)FAIL (1 times)

  test_bpf: #165 ALU_SDIV_X: -6 / 2 = -3 jited:1 ret 2147483645 != -3 (0x7ffffffd != 0xfffffffd)FAIL (1 times)
  test_bpf: #166 ALU_SDIV_K: -6 / 2 = -3 jited:1 ret 2147483645 != -3 (0x7ffffffd != 0xfffffffd)FAIL (1 times)

  test_bpf: #169 ALU_SMOD_X: -7 % 2 = -1 jited:1 ret 1 != -1 (0x1 != 0xffffffff)FAIL (1 times)
  test_bpf: #170 ALU_SMOD_K: -7 % 2 = -1 jited:1 ret 1 != -1 (0x1 != 0xffffffff)FAIL (1 times)

  test_bpf: #172 ALU64_SMOD_K: -7 % 2 = -1 jited:1 ret 1 != -1 (0x1 != 0xffffffff)FAIL (1 times)

  test_bpf: #313 BSWAP 16: 0x0123456789abcdef -> 0xefcd
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 301 PASS
  test_bpf: #314 BSWAP 32: 0x0123456789abcdef -> 0xefcdab89
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 555 PASS
  test_bpf: #315 BSWAP 64: 0x0123456789abcdef -> 0x67452301
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 268 PASS
  test_bpf: #316 BSWAP 64: 0x0123456789abcdef >> 32 -> 0xefcdab89
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 269 PASS
  test_bpf: #317 BSWAP 16: 0xfedcba9876543210 -> 0x1032
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 460 PASS
  test_bpf: #318 BSWAP 32: 0xfedcba9876543210 -> 0x10325476
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 320 PASS
  test_bpf: #319 BSWAP 64: 0xfedcba9876543210 -> 0x98badcfe
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 222 PASS
  test_bpf: #320 BSWAP 64: 0xfedcba9876543210 >> 32 -> 0x10325476
  eBPF filter opcode 00d7 (@2) unsupported
  jited:0 273 PASS

  test_bpf: #344 BPF_LDX_MEMSX | BPF_B
  eBPF filter opcode 0091 (@5) unsupported
  jited:0 432 PASS
  test_bpf: #345 BPF_LDX_MEMSX | BPF_H
  eBPF filter opcode 0089 (@5) unsupported
  jited:0 381 PASS
  test_bpf: #346 BPF_LDX_MEMSX | BPF_W
  eBPF filter opcode 0081 (@5) unsupported
  jited:0 505 PASS

  test_bpf: #490 JMP32_JA: Unconditional jump: if (true) return 1
  eBPF filter opcode 0006 (@1) unsupported
  jited:0 261 PASS

  test_bpf: Summary: 1040 PASSED, 10 FAILED, [924/1038 JIT'ed]

Fix them by adding missing processing.

Fixes: daabb2b ("bpf/tests: add tests for cpuv4 instructions")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/91de862dda99d170697eb79ffb478678af7e0b27.1709652689.git.christophe.leroy@csgroup.eu
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