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riscv: Add fine-tuned checksum functions #188

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@bjoto bjoto commented Oct 27, 2023

Pull request for series with
subject: riscv: Add fine-tuned checksum functions
version: 8
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=797256

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bjoto commented Oct 27, 2023

Upstream branch: 3fec323
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=797256
version: 8

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bjoto commented Oct 31, 2023

Upstream branch: 3fec323
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=797256
version: 8

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bjoto commented Nov 1, 2023

Upstream branch: 3fec323
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=798037
version: 9

@bjoto bjoto added V9 and removed V8 labels Nov 1, 2023
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bjoto commented Nov 1, 2023

Upstream branch: 3fec323
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=798270
version: 10

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bjoto commented Nov 11, 2023

Upstream branch: 3ca112b
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=798270
version: 10

Pull request is NOT updated. Failed to apply https://patchwork.kernel.org/project/linux-riscv/list/?series=798270
error message:

Cmd('git') failed due to: exit code(128)
  cmdline: git am -s --3way
  stdout: 'Applying: asm-generic: Improve csum_fold
Applying: riscv: Add static key for misaligned accesses
Using index info to reconstruct a base tree...
M	arch/riscv/include/asm/cpufeature.h
M	arch/riscv/kernel/cpufeature.c
Falling back to patching base and 3-way merge...
Auto-merging arch/riscv/kernel/cpufeature.c
CONFLICT (content): Merge conflict in arch/riscv/kernel/cpufeature.c
Auto-merging arch/riscv/include/asm/cpufeature.h
Patch failed at 0002 riscv: Add static key for misaligned accesses
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".'
  stderr: 'error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch'

conflict:

diff --cc arch/riscv/kernel/cpufeature.c
index b3785ffc1570,8935481d32da..000000000000
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@@ -8,8 -8,8 +8,9 @@@
  
  #include <linux/acpi.h>
  #include <linux/bitmap.h>
 +#include <linux/cpuhotplug.h>
  #include <linux/ctype.h>
+ #include <linux/jump_label.h>
  #include <linux/log2.h>
  #include <linux/memory.h>
  #include <linux/module.h>
@@@ -722,12 -666,35 +723,44 @@@ out
  
  arch_initcall(check_unaligned_access_all_cpus);
  
++<<<<<<< HEAD
 +void riscv_user_isa_enable(void)
 +{
 +	if (riscv_cpu_has_extension_unlikely(smp_processor_id(), RISCV_ISA_EXT_ZICBOZ))
 +		csr_set(CSR_SENVCFG, ENVCFG_CBZE);
 +}
 +
++=======
+ DEFINE_STATIC_KEY_FALSE(fast_misaligned_access_speed_key);
+ 
+ static int set_unaligned_access_static_branches(void)
+ {
+ 	/*
+ 	 * This will be called after check_unaligned_access_all_cpus so the
+ 	 * result of unaligned access speed for all cpus will be available.
+ 	 */
+ 
+ 	int cpu;
+ 	bool fast_misaligned_access_speed = true;
+ 
+ 	for_each_online_cpu(cpu) {
+ 		int this_perf = per_cpu(misaligned_access_speed, cpu);
+ 
+ 		if (this_perf != RISCV_HWPROBE_MISALIGNED_FAST) {
+ 			fast_misaligned_access_speed = false;
+ 			break;
+ 		}
+ 	}
+ 
+ 	if (fast_misaligned_access_speed)
+ 		static_branch_enable(&fast_misaligned_access_speed_key);
+ 
+ 	return 0;
+ }
+ 
+ arch_initcall_sync(set_unaligned_access_static_branches);
+ 
++>>>>>>> riscv: Add static key for misaligned accesses
  #ifdef CONFIG_RISCV_ALTERNATIVE
  /*
   * Alternative patch sites consider 48 bits when determining when to patch

@bjoto bjoto force-pushed the fixes_base branch 4 times, most recently from 31bea4c to 26966d3 Compare December 8, 2023 16:12
This csum_fold implementation introduced into arch/arc by Vineet Gupta
is better than the default implementation on at least arc, x86, and
riscv. Using GCC trunk and compiling non-inlined version, this
implementation has 41.6667%, 25% fewer instructions on riscv64, x86-64
respectively with -O3 optimization. Most implmentations override this
default in asm, but this should be more performant than all of those
other implementations except for arm which has barrel shifting and
sparc32 which has a carry flag.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: David Laight <david.laight@aculab.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Support static branches depending on the value of misaligned accesses.
This will be used by a later patch in the series. All cpus must be
considered "fast" for this static branch to be flipped.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Provide checksum algorithms that have been designed to leverage riscv
instructions such as rotate. In 64-bit, can take advantage of the larger
register to avoid some overflow checking.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Xiao Wang <xiao.w.wang@intel.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Provide a 32 and 64 bit version of do_csum. When compiled for 32-bit
will load from the buffer in groups of 32 bits, and when compiled for
64-bit will load in groups of 64 bits.

Additionally provide riscv optimized implementation of csum_ipv6_magic.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Xiao Wang <xiao.w.wang@intel.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Supplement existing checksum tests with tests for csum_ipv6_magic and
ip_fast_csum.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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bjoto commented Dec 13, 2023

Upstream branch: eb46a00
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=809482
version: 12

@bjoto bjoto closed this Dec 13, 2023
@bjoto bjoto deleted the series/779663=>fixes branch December 19, 2023 15:17
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