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riscv: sophgo: add clock support for sg2042 #342
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Upstream branch: 3ca112b |
Upstream branch: 3ca112b |
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Add documentation to describe Sophgo System Controller for SG2042. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Upstream branch: b85ea95 |
Add bindings for the clock generator on the SG2042 RISC-V SoC. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Add a driver for the SOPHGO SG2042 clock generator. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
Add clock generator node to device tree for SG2042, and enable clock for uart. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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At least one diff in series https://patchwork.kernel.org/project/linux-riscv/list/?series=807773 irrelevant now. Closing PR. |
Pull request for series with
subject: riscv: sophgo: add clock support for sg2042
version: 3
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=806602