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clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz #815

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@bjoto bjoto commented Apr 2, 2024

Pull request for series with
subject: clk: starfive: pll: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz
version: 3
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=840524

… 1.5GHz

CPUfreq supports 4 cpu frequency loads on 375/500/750/1500MHz.
But now PLL0 rate is 1GHz and the cpu frequency loads become
333/500/500/1000MHz in fact.

So PLL0 rate should be default set to 1.5GHz. But setting the
PLL0 rate need certain steps:

1. Change the parent of cpu_root clock to OSC clock.
2. Change the divider of cpu_core if PLL0 rate is higher than
   1.25GHz before CPUfreq boot.
3. Change the parent of cpu_root clock back to PLL0 clock.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Fixes: e2c510d ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC")
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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bjoto commented Apr 2, 2024

Upstream branch: 4cece76
series: https://patchwork.kernel.org/project/linux-riscv/list/?series=840524
version: 3

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bjoto commented Apr 9, 2024

At least one diff in series https://patchwork.kernel.org/project/linux-riscv/list/?series=840524 irrelevant now. Closing PR.

@bjoto bjoto closed this Apr 9, 2024
@bjoto bjoto deleted the series/840524=>for-next branch April 9, 2024 14:31
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