riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init() #897
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…f_init() ci_leaf_init() is a declared static function. The implementation of the function body and the caller do not use the parameter (struct device_node *node) input parameter, so remove it. Fixes: 6a24915 ("Revert "riscv: Set more data to cacheinfo"") Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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Before cacheinfo can be built correctly, we need to initialize level and type. Since RISC-V currently does not have a register group that describes cache-related attributes like ARM64, we cannot obtain them directly, so now we obtain cache leaves from the ACPI PPTT table (acpi_get_cache_info()) and set the cache type through split_levels. Suggested-by: Jeremy Linton <jeremy.linton@arm.com> Suggested-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
After adding ACPI support to populate_cache_leaves(), RISC-V can build cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT configuration. Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
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Pull request for series with
subject: riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init()
version: 4
url: https://patchwork.kernel.org/project/linux-riscv/list/?series=845655