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Merge remote-tracking branch 'linux-pinctrl/for-next' into sunxi-next
This brings in H3 R_PIO support.
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49
Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt
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* Microchip PIC32 GPIO devices (PIO). | ||
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Required properties: | ||
- compatible: "microchip,pic32mzda-gpio" | ||
- reg: Base address and length for the device. | ||
- interrupts: The port interrupt shared by all pins. | ||
- gpio-controller: Marks the port as GPIO controller. | ||
- #gpio-cells: Two. The first cell is the pin number and | ||
the second cell is used to specify the gpio polarity as defined in | ||
defined in <dt-bindings/gpio/gpio.h>: | ||
0 = GPIO_ACTIVE_HIGH | ||
1 = GPIO_ACTIVE_LOW | ||
2 = GPIO_OPEN_DRAIN | ||
- interrupt-controller: Marks the device node as an interrupt controller. | ||
- #interrupt-cells: Two. The first cell is the GPIO number and second cell | ||
is used to specify the trigger type as defined in | ||
<dt-bindings/interrupt-controller/irq.h>: | ||
IRQ_TYPE_EDGE_RISING | ||
IRQ_TYPE_EDGE_FALLING | ||
IRQ_TYPE_EDGE_BOTH | ||
- clocks: Clock specifier (see clock bindings for details). | ||
- microchip,gpio-bank: Specifies which bank a controller owns. | ||
- gpio-ranges: Interaction with the PINCTRL subsystem. | ||
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Example: | ||
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/* PORTA */ | ||
gpio0: gpio0@1f860000 { | ||
compatible = "microchip,pic32mzda-gpio"; | ||
reg = <0x1f860000 0x100>; | ||
interrupts = <118 IRQ_TYPE_LEVEL_HIGH>; | ||
#gpio-cells = <2>; | ||
gpio-controller; | ||
interrupt-controller; | ||
#interrupt-cells = <2>; | ||
clocks = <&PBCLK4>; | ||
microchip,gpio-bank = <0>; | ||
gpio-ranges = <&pic32_pinctrl 0 0 16>; | ||
}; | ||
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keys { | ||
... | ||
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button@sw1 { | ||
label = "ESC"; | ||
linux,code = <1>; | ||
gpios = <&gpio0 12 0>; | ||
}; | ||
}; |
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Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
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* Microchip PIC32 Pin Controller | ||
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Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and | ||
../interrupt-controller/interrupts.txt for generic information regarding | ||
pin controller, GPIO, and interrupt bindings. | ||
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PIC32 'pin configuration node' is a node of a group of pins which can be | ||
used for a specific device or function. This node represents configuraions of | ||
pins, optional function, and optional mux related configuration. | ||
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Required properties for pin controller node: | ||
- compatible: "microchip,pic32mada-pinctrl" | ||
- reg: Address range of the pinctrl registers. | ||
- clocks: Clock specifier (see clock bindings for details) | ||
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Required properties for pin configuration sub-nodes: | ||
- pins: List of pins to which the configuration applies. | ||
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Optional properties for pin configuration sub-nodes: | ||
---------------------------------------------------- | ||
- function: Mux function for the specified pins. | ||
- bias-pull-up: Enable weak pull-up. | ||
- bias-pull-down: Enable weak pull-down. | ||
- input-enable: Set the pin as an input. | ||
- output-low: Set the pin as an output level low. | ||
- output-high: Set the pin as an output level high. | ||
- microchip,digital: Enable digital I/O. | ||
- microchip,analog: Enable analog I/O. | ||
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Example: | ||
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pic32_pinctrl: pinctrl@1f801400{ | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "microchip,pic32mzda-pinctrl"; | ||
reg = <0x1f801400 0x400>; | ||
clocks = <&PBCLK1>; | ||
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pinctrl_uart2: pinctrl_uart2 { | ||
uart2-tx { | ||
pins = "G9"; | ||
function = "U2TX"; | ||
microchip,digital; | ||
output-low; | ||
}; | ||
uart2-rx { | ||
pins = "B0"; | ||
function = "U2RX"; | ||
microchip,digital; | ||
input-enable; | ||
}; | ||
}; | ||
}; | ||
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uart2: serial@1f822200 { | ||
compatible = "microchip,pic32mzda-uart"; | ||
reg = <0x1f822200 0x50>; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_uart2>; | ||
}; |
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126
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
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* STM32 GPIO and Pin Mux/Config controller | ||
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STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware | ||
controller. It controls the input/output settings on the available pins and | ||
also provides ability to multiplex and configure the output of various on-chip | ||
controllers onto these pads. | ||
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Pin controller node: | ||
Required properies: | ||
- compatible: value should be one of the following: | ||
(a) "st,stm32f429-pinctrl" | ||
- #address-cells: The value of this property must be 1 | ||
- #size-cells : The value of this property must be 1 | ||
- ranges : defines mapping between pin controller node (parent) to | ||
gpio-bank node (children). | ||
- pins-are-numbered: Specify the subnodes are using numbered pinmux to | ||
specify pins. | ||
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GPIO controller/bank node: | ||
Required properties: | ||
- gpio-controller : Indicates this device is a GPIO controller | ||
- #gpio-cells : Should be two. | ||
The first cell is the pin number | ||
The second one is the polarity: | ||
- 0 for active high | ||
- 1 for active low | ||
- reg : The gpio address range, relative to the pinctrl range | ||
- clocks : clock that drives this bank | ||
- st,bank-name : Should be a name string for this bank as specified in | ||
the datasheet | ||
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Optional properties: | ||
- reset: : Reference to the reset controller | ||
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Example: | ||
#include <dt-bindings/pinctrl/stm32f429-pinfunc.h> | ||
... | ||
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pin-controller { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "st,stm32f429-pinctrl"; | ||
ranges = <0 0x40020000 0x3000>; | ||
pins-are-numbered; | ||
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gpioa: gpio@40020000 { | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
reg = <0x0 0x400>; | ||
resets = <&reset_ahb1 0>; | ||
st,bank-name = "GPIOA"; | ||
}; | ||
... | ||
pin-functions nodes follow... | ||
}; | ||
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Contents of function subnode node: | ||
---------------------------------- | ||
Subnode format | ||
A pinctrl node should contain at least one subnode representing the | ||
pinctrl group available on the machine. Each subnode will list the | ||
pins it needs, and how they should be configured, with regard to muxer | ||
configuration, pullups, drive, output high/low and output speed. | ||
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node { | ||
pinmux = <PIN_NUMBER_PINMUX>; | ||
GENERIC_PINCONFIG; | ||
}; | ||
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Required properties: | ||
- pinmux: integer array, represents gpio pin number and mux setting. | ||
Supported pin number and mux varies for different SoCs, and are defined in | ||
dt-bindings/pinctrl/<soc>-pinfunc.h directly. | ||
These defines are calculated as: | ||
((port * 16 + line) << 8) | function | ||
With: | ||
- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11) | ||
- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15) | ||
- function: The function number, can be: | ||
* 0 : GPIO | ||
* 1 : Alternate Function 0 | ||
* 2 : Alternate Function 1 | ||
* 3 : Alternate Function 2 | ||
* ... | ||
* 16 : Alternate Function 15 | ||
* 17 : Analog | ||
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Optional properties: | ||
- GENERIC_PINCONFIG: is the generic pinconfig options to use. | ||
Available options are: | ||
- bias-disable, | ||
- bias-pull-down, | ||
- bias-pull-up, | ||
- drive-push-pull, | ||
- drive-open-drain, | ||
- output-low | ||
- output-high | ||
- slew-rate = <x>, with x being: | ||
< 0 > : Low speed | ||
< 1 > : Medium speed | ||
< 2 > : Fast speed | ||
< 3 > : High speed | ||
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Example: | ||
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pin-controller { | ||
... | ||
usart1_pins_a: usart1@0 { | ||
pins1 { | ||
pinmux = <STM32F429_PA9_FUNC_USART1_TX>; | ||
bias-disable; | ||
drive-push-pull; | ||
slew-rate = <0>; | ||
}; | ||
pins2 { | ||
pinmux = <STM32F429_PA10_FUNC_USART1_RX>; | ||
bias-disable; | ||
}; | ||
}; | ||
}; | ||
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&usart1 { | ||
pinctrl-0 = <&usart1_pins_a>; | ||
pinctrl-names = "default"; | ||
status = "okay"; | ||
}; |
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