[supervision] New port. (#324)

README.md

@@ -175,6 +175,7 @@ executables and libraries for that target.
 | PC Engine                       | Standard           | `mos-pce-clang`                  |
 | PC Engine                       | CD                 | `mos-pce-cd-clang`               |
 | RPC/8e (RedPower 2)             | -                  | `mos-rpc8e-clang`                |
+| Watara Supervision              | -                  | `mos-supervision-clang`          |
 | 6502 simulator                  | -                  | `mos-sim-clang`                  |
 
 

mos-platform/CMakeLists.txt

@@ -80,4 +80,5 @@ add_subdirectory(pce-common)
 add_subdirectory(pce)
 add_subdirectory(pce-cd)
 add_subdirectory(rp6502)
+add_subdirectory(supervision)
 add_subdirectory(vic20)

mos-platform/supervision/CMakeLists.txt

@@ -0,0 +1,28 @@
+platform(supervision COMPLETE PARENT common)
+
+if(NOT CMAKE_CROSSCOMPILING)
+  return()
+endif()
+
+include_directories(BEFORE SYSTEM .)
+
+install(FILES
+  supervision.h
+TYPE INCLUDE)
+
+add_platform_object_file(supervision-crt0-o crt0.o crt0.c)
+
+add_platform_library(supervision-crt0)
+merge_libraries(supervision-crt0
+  common-copy-data
+  common-init-stack
+  common-zero-bss
+  common-exit-loop
+)
+
+add_platform_library(supervision-c
+  supervision.c
+  supervision.s
+)
+target_include_directories(supervision-c SYSTEM BEFORE PUBLIC .)
+target_link_libraries(supervision-c PRIVATE common-asminc)

mos-platform/supervision/clang.cfg

@@ -0,0 +1,3 @@
+-mcpu=mos65c02
+-D__SUPERVISION__
+-mlto-zp=224

mos-platform/supervision/crt0.c

@@ -0,0 +1,43 @@
+#include "supervision.h"
+
+// Set up the hardware stack and launch early initialization.
+asm(".section .init.50,\"axR\",@progbits\n"
+    "  sei\n"
+    "  ldx #$ff\n"
+    "  txs\n"
+    "  jsr __early_init\n");
+
+void __early_init(void) {
+    // Disable NMI, LCD, configure default bank.
+    sv_sys_control_set(SV_SYS_BANK(0) |
+                       SV_SYS_NMI_DISABLE |
+                       SV_SYS_IRQ_TIMER_DISABLE |
+                       SV_SYS_IRQ_AUDIO_DMA_DISABLE |
+                       SV_SYS_LCD_DISABLE);
+}
+
+// Establish trivial irq handler.
+asm(".text\n"
+    ".weak irq\n"
+    "irq:\n"
+    "  rti\n");
+
+// Establish default nmi handler prologue and epilogue.
+asm(".section .nmi_begin,\"axG\",@progbits,nmi\n"
+    ".weak nmi\n"
+    ".globl __default_nmi\n"
+    "nmi:\n"
+    "__default_nmi:\n"
+    "  pha\n"
+    "  txa\n"
+    "  pha\n"
+    "  tya\n"
+    "  pha\n"
+
+    ".section .nmi_end,\"axG\",@progbits,nmi\n"
+    "  pla\n"
+    "  tay\n"
+    "  pla\n"
+    "  tax\n"
+    "  pla\n"
+    "  rti\n");

mos-platform/supervision/link.ld

@@ -0,0 +1,86 @@
+/* Watara Supervision cartridge linker script.
+
+   Handles both unbanked 32KB cartridges and banked 64KB/128KB cartridges.
+*/
+
+PROVIDE(__cart_rom_size = 32);
+
+ASSERT(__cart_rom_size == 1 << LOG2CEIL(__cart_rom_size),
+       "__cart_rom_size must be a power of 2.")
+ASSERT(__cart_rom_size >= 32,
+       "__cart_rom_size must be >= 32 KiB.")
+ASSERT(__cart_rom_size <= 128,
+       "__cart_rom_size must be <= 128 KiB.")
+
+/* Provide imaginary (zero page) registers. */
+__rc0 = 0x00;
+INCLUDE imag-regs.ld
+ASSERT(__rc31 == 0x001f, "Inconsistent zero page map.")
+
+MEMORY {
+    zp : ORIGIN = __rc31 + 1, LENGTH = 0x100 - (__rc31 + 1)
+    ram (rw) : ORIGIN = 0x200, LENGTH = 0x2000 - 0x200
+}
+
+__bank0_lma = 0x01008000;
+__bank1_lma = 0x01018000;
+__bank2_lma = 0x01028000;
+__bank3_lma = 0x01038000;
+__bank4_lma = 0x01048000;
+__bank5_lma = 0x01058000;
+__bank6_lma = 0x01068000;
+
+MEMORY {
+  rom_0 : ORIGIN = __bank0_lma, LENGTH = __cart_rom_size >= 64 ? 0x4000 : 0
+  rom_1 : ORIGIN = __bank1_lma, LENGTH = __cart_rom_size >= 64 ? 0x4000 : 0
+  rom_2 : ORIGIN = __bank2_lma, LENGTH = __cart_rom_size >= 64 ? 0x4000 : 0
+  rom_3 : ORIGIN = __bank3_lma, LENGTH = __cart_rom_size >= 128 ? 0x4000 : 0
+  rom_4 : ORIGIN = __bank4_lma, LENGTH = __cart_rom_size >= 128 ? 0x4000 : 0
+  rom_5 : ORIGIN = __bank5_lma, LENGTH = __cart_rom_size >= 128 ? 0x4000 : 0
+  rom_6 : ORIGIN = __bank6_lma, LENGTH = __cart_rom_size >= 128 ? 0x4000 : 0
+  rom_fixed : ORIGIN = (__cart_rom_size >= 64 ? 0xc000 : 0x8000), LENGTH = (__cart_rom_size >= 64 ? 0x4000 : 0x8000) - 6
+  vectors : ORIGIN = 0x10000 - 0x6, LENGTH = 6
+}
+
+REGION_ALIAS("c_readonly", rom_fixed)
+REGION_ALIAS("c_writeable", ram)
+
+SECTIONS {
+  .text : {
+       INCLUDE text-sections.ld
+       *(.nmi_begin)
+       *(SORT_BY_INIT_PRIORITY(.nmi.* .nmi))
+       *(.nmi_end)
+  } >c_readonly
+  INCLUDE rodata.ld
+  INCLUDE data.ld
+  INCLUDE zp.ld
+  INCLUDE bss.ld
+  INCLUDE noinit.ld
+
+  .rom_0 : { *(.rom_0 .rom_0.*) } >rom_0
+  .rom_1 : { *(.rom_1 .rom_1.*) } >rom_1
+  .rom_2 : { *(.rom_2 .rom_2.*) } >rom_2
+  .rom_3 : { *(.rom_3 .rom_3.*) } >rom_3
+  .rom_4 : { *(.rom_4 .rom_4.*) } >rom_4
+  .rom_5 : { *(.rom_5 .rom_5.*) } >rom_5
+  .rom_6 : { *(.rom_6 .rom_6.*) } >rom_6
+  .rom_fixed : { *(.rom_7 .rom_7.* .rom_fixed .rom_fixed.*) } >rom_fixed
+
+  .vectors : { SHORT(nmi) SHORT(_start) SHORT(irq) } >vectors
+}
+
+/* Set initial soft stack address to just above last memory address. (It grows down.) */
+__stack = 0x2000;
+
+OUTPUT_FORMAT {
+  FULL(rom_0)
+  FULL(rom_1)
+  FULL(rom_2)
+  FULL(rom_3)
+  FULL(rom_4)
+  FULL(rom_5)
+  FULL(rom_6)
+  FULL(rom_fixed)
+  FULL(vectors)
+}

mos-platform/supervision/supervision.c

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2024 Adrian "asie" Siekierka
+ *
+ * Licensed under the Apache License, Version 2.0 with LLVM Exceptions,
+ * See https://github.com/llvm-mos/llvm-mos-sdk/blob/main/LICENSE for license
+ * information.
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include "supervision.h"
+
+__attribute__((section(".zp.bss"))) volatile uint8_t __sys_control;
+
+uint8_t sv_sys_control_get(void) {
+	return __sys_control;
+}
+
+void sv_sys_control_set(uint8_t value) {
+	__sys_control = value;
+	SV_SYS.control = value;
+}
+
+void sv_lcd_clear(void) {
+	memset(SV_VRAM, 0, SV_VRAM_PITCH * SV_VRAM_HEIGHT);
+}
+
+void sv_lcd_enable(void) {
+	SV_LCD.width = SV_LCD_WIDTH;
+	SV_LCD.height = SV_LCD_HEIGHT;
+	SV_LCD.x = 0;
+	SV_LCD.y = 0;
+	sv_sys_control_set(sv_sys_control_get() | SV_SYS_LCD_ENABLE);
+}
+
+void sv_lcd_disable(void) {
+	sv_sys_control_set(sv_sys_control_get() & ~SV_SYS_LCD_ENABLE);
+}
+
+void sv_dma_to_vram(void *dest, const void *src, uint16_t len) {
+	SV_VDMA.cpu = src;
+	SV_VDMA.vram = SV_VDMA_TO_VRAM(dest);
+	SV_VDMA.length = len >> 4;
+	SV_VDMA.trigger = SV_TRIGGER_START;
+	SV_VDMA.trigger = SV_TRIGGER_STOP;
+}
+
+void sv_dma_from_vram(void *dest, const void *src, uint16_t len) {
+	SV_VDMA.cpu = dest;
+	SV_VDMA.vram = SV_VDMA_FROM_VRAM(src);
+	SV_VDMA.length = len >> 4;
+	SV_VDMA.trigger = SV_TRIGGER_START;
+	SV_VDMA.trigger = SV_TRIGGER_STOP;
+}
+
+uint8_t sv_bank_get(void) {
+	return sv_sys_control_get() >> 5;
+}
+
+void sv_bank_set(uint8_t value) {
+	sv_sys_control_set((value << 5) | (sv_sys_control_get() & 0x1F));
+}