SDK v6.1.0

New features

• llvm-mos/llvm-mos#357 -- SCP700 (SNES sound coprocessor) support -- @asiekierka

Bug fixes

• llvm-mos/llvm-mos#369 -- Fix various issues with zero page pointers (e.g., llvm-mos/llvm-mos#366, llvm-mos/llvm-mos#363) -- @asiekierka

• Use __builtin_bit_cast to allow constexpr initialization of struct of array arrays.

  • This was thought to work, but the previous implementation invoked reinterpret_cast, which isn't legal in constexpr. The new version works so long as the types don't contain pointers. For those that do, there's intrinsically no way to statically initialize them in C++; this has to instead be done in an assembly file using #<ptr and #>ptr.

Optimization

• Loop induction variable canonicalization now prefers narrower types instead of wider ones. This can replace 16-bit loop counters with zero-extensions of 8-bit ones. Doesn't come up tremendously often, but when it does, the previous behavior absolutely killed performance.

• #222 - Make neslib/nesdoug buffers weak so they can be moved by the user; move PAL_BUF out of hardware stack by default -- @cogwheel

• Fix C++-invalid cast in nes.h

SDK v6.0.0

Breaking changes

• #220 -- NES -- Rename bank.h to mapper.h -- @asiekierka
  • These were originally shortenings of bank_helpers.h from nesdoug, but as they gained more mapper-related functionality they were increasingly inaccurately named. Backwards incompatible changes like this are better to happen earlier, before too many NES projects depend on the API in the wild.

New features

• llvm-mos/llvm-mos#348 -- Zero page pointers -- @asiekierka
  • Variables can now be annotated with __zeropage or __zp to change their address space, e.g., char __zeropage value. These variables are automatically placed in .zp.noinit, .zp.data, or .zp.bss, as appropariate. What separates this from regular explicit section annotations is that pointers can also be annotated as pointing to zero page variables, e.g., char __zeropage *ptr. These pointers only take 8 bits, and arbitrary constant offsets backwards and forwards from them can be referenced using the zp,x or zp,y addressing modes. For example, if x is a zero page pointer stored in X, a read from x[2] can be done using lda 2,x, and a load from x[-2] can be done using lda 254,x. This should be the preferred way of manually placing values in the zero page going forward.
• #211 -- NES MMC3 -- Add macros to set four-screen nametables -- @cogwheel
• #207 -- Commander X16 -- Add VERA FX register to cx16.h -- @ToboterXP
• #212 -- NES -- Improve NMI performnace for multi_vram_buffer operations -- @cogwheel
• #218 -- NES -- Add .ram output section to explicitly place input sections in NES RAM -- @cogwheel

Optimizations

• #217, #221 -- Split neslib and nesdoug components out so they are only linked in as used.
  • These libraries were previously fairly monolithic, so using any of them tended to link in a large amount of data and NMI handlers. These have now been broken up, so largely only NMI handlers for the used portion of the library are brought into the program.

Bug fixes

• #209 -- Fix MMC3 bug when where C sections would remain uninitialized if placed in PRG-RAM -- @cogwheel

SDK v5.0.0

Breaking changes

• The NES MMC1 mapper target no longer needs to have its PRG-ROM size specified by including a custom linker script. Instead, the default linker script is now directly responsive to the __prg_rom_size symbol, like the other mappers, and the previous linker script fragments to set this have been removed from the SDK.
• Removed CHR-ROM shadow accessors from the NES Action53 mappers. These are difficult to keep up-to-date in the face of NMI, and they were argued to have limited utility.

New targets

• #191 -- nes-unrom-512 -- NES UNROM-512 mapper -- @asiekierka
• #199 -- nes-gtrom -- NES GTROM mapper -- @asiekierka
  • Notably, this is the first time we've supported a mapper with full 32KiB banking. To allow for this, the C sections are automatically placed in a simulated fixed region; this is duplicated in every bank at the same fixed offset at the start of each bank. The fixed region can grow or shrink dynamically, and code/rodata can still be explicitly placed in a named bank to remove it from the fixed region.

New features

• #197 -- Array of Structs library
  • This provides a C++ library that automatically lays out an array of multi-byte types in a byte-wise fashion. That is, this turns an array of structs into a structure of arrays of bytes, one for each byte of the wrapped type. This allows accessing the contents of the array elements using the absolute indexed addressing mode, rather than doing expensive pointer arithmetic. See examples/struct-of-arrays.cc and mos-platform/common/include/soa.h for details.
• #201 -- C++ user-defined literal support for translating to Atari 8-bit and Commodore X16 character sets -- @asiekierka
• #203 -- NES -- Added ines.h header containing C macros to easily set linker script configuration -- @asiekierka

Bug fixes

• #194, #196 -- Safely handle bus conflicts on affected NES mappers -- @asiekierka
• #198 -- Safely handle NMI conflicts in CNROM, UNROM, and UNROM-512 -- @asiekierka
• #202 -- Correct LTO zero page available in Atari 8-bit targets -- @asiekierka

SDK v4.0.0

Breaking changes

• The compiler now defaults to the behavior of -fshort-enums. enum types without explicitly specified types now take on the smallest integer type in which they will fit. This generally decreases the space and time overhead of enums, and this choice is common on embedded targets. The old behavior is still available through -fno-short-enums, but it now represents a non-standard ABI, and translation units using this option cannot be guaranteed compatible with those using the default, e.g., the SDK. The new default also comes with a few additional points of care:
  • Changes to the set of enum values can break ABI in more cases than previously
  • Since short and int are the same size on our platform, but are not the same type, a pointer to an enumerator that contains values that only fit in int is now only compatible with a pointer to short, not a pointer to int. Even though these are effectively the same type on our platform, the C standard still rules it undefined behavior to access such an enum through a pointer to int, or to use them in a context where compatible types are expected, e.g., on two branches of the ternary operator.

New targets

• #190 -- nes-unrom -- NES UNROM mapper -- @asiekierka

New features

• llvm-mos/llvm-mos#344 -- Preprocessor macros to indicate CPU types containing currently available features -- @asiekierka
• llvm-mos/llvm-mos#345 -- Implement llvm-objdump --symbolize-operands to show symbolic names for operands in disassembly -- @asiekierka

Bug fixes

• llvm-mos/llvm-mos#342 -- Fix build when using LLVM/Clang 16 -- @asiekierka
• llvm-mos/llvm-mos#345 -- Fix 65816 BRL behavior -- @asiekierka
• NES MMC3's .reset and .vector section sizes are now accurately reported in the linker map file (previously they contained fill bytes).

SDK v3.1.0

New targets

• #180 -- nes-action53 NES Action53 mapper (e.g. yearly NesDev Compo) -- @jroweboy

Bug fixes

• #179 -- Fix MSVC compile error in PCE util -- @jroweboy
• #182 -- Changes to platform object files in the SDK now correctly trigger a
  re-install of that object.

Optimizations

• #181 -- Change oam_spr to take 2 fewer clock cycles -- @Andrew900460

SDK v3.0.0

Breaking changes

• c.ld now places read-only sections and initializer LMAs into c_readable. It also now places writeable sections and their VMAs in c_writeable. These need to be defined explicitly now, rather than defaulting to ram. ROM targets are now just as numerous as RAM targets, so this removes duplication by allowing c.ld to be used by both.

New features

• Add C++20 custom string literals for Commodore 64/PET PETSCII/Video character sets
  • See https://llvm-mos.org/wiki/Character_set for details

Bug fixes

• #163 - Fix initialization of T2 in eater systick code -- @rweather
• Make INC A/DEC A actually change A on the 65C02 simulator.
• Quote clang command name in Windows .bat wrappers, allowing the SDK to be used from a path containing spaces.

Optimizations

• Prefer selecting CMOS INC/DEC over NMOS versions.

SDK v2.4.0

New codegen features

• llvm-mos/llvm-mos#333 - Initial legalizer support for floating point types -- @rweather
  • Most operations lower to libcalls; still incomplete
  • A few additional legalization fixes by @mysterymath

New assembler features

• llvm-mos/llvm-mos#326 -- Finished assembler support for 45GS02 -- @mlund

Optimizations

• Constant folding for 6502-specific generic instructions.
• llvm-mos/llvm-mos#335 -- Only produce demanded bits of wide shifts
  • Yields a 1-second win on 10 iterations of CoreMark.

Bug fixes

• llvm-mos/llvm-mos#329 -- Fix c and v clobbers for inline assembly
• llvm-mos/llvm-mos#328 -- Correct fixup for imaginary registers in prefixed mnemonics -- @mlund
• Orphan sections are now sorted using an order that includes whether the section is named for the zero page (.zp or .zp.*). This helps prevent non-zero-page orphan sections from being slotted into the zero page, where they may not fit.
• The same logic is now used throughout the compiler for determining whether an input section name belongs to the zero page.
• llvm-mos/llvm-mos#337 -- Fix breakage in Godbolt due to flag default being unsupported in GlobalISel
• Corrected the zero page length calculation on the PCE target.
• .zeropage[.*] and .directpage.* now map to .zp in the common C linker script.

Misc

• Merged from upstream LLVM
• #157 -- Make asm labels local on eater -- @rweather

SDK v2.3.0

New features

• llvm-mos/llvm-mos#323 - Add assembly support for the 45GS02 (MEGA65) and its new opcodes over the 4510 - @mlund
  • #152 - The MEGA65 target now uses this CPU variant by default - @mlund
• #150 - Add API for the 16x2 LCD screen on Ben Eater's breadboard computer - @rweather

Bug fixes

• llvm-mos/llvm-mos#325 - Fixed infinite loop when an invalid expression appears in a line of assembly - @johnwbyrd

SDK v2.2.0

Bug fixes

• Don't use immediate BIT to set V on CPUs other than HuC6280. On other CPUs, immediate BIT either doesn't affect V or clobbers it.

  • Thanks to @XarkLabs and @asiekierka for the diagnosis and fix recommendation.
  • Also fixed the 65c02 simulator.

• #144 - Fix error return for cbm_k_load for commodore targets.

New targets

• #149 - eater - Port to Ben Eater's 6502 Breadboard Computer, configured with a W65C51N ACAI and W65C22 VIA - @rweather

Common libraries

• #147 - Add atoi and atol - @asiekierka

Platform libraries

• #143,#146 - Add cbm_k_rdtime KERNAL call for CX16 target - @XarkLabs
• #148 - Add C64 assembly include paths to mega65 target - @mlund

SDK v2.1.0

Bug fixes

• Corrected short/[u]int16_t alignment to 8 bits, rather than 16.
• #136 -- Make cx16.h usable from C++ -- @mlund
• #139 -- Fix breakage in PCE targets (#138) due to missing CMake library merging -- @asiekierka

New features

• llvm-mos/llvm-mos#315 -- Accept 64tass syntax (e.g. rmb 0, $ea) for Rockwell bit instructions -- @asiekierka
• #137 -- Add strcat and strncat to libc -- @XarkLabs

Optimization

• llvm-mos/llvm-mos#316 -- Emit BRA opcode on 65DTV02 subtarget -- @asiekierka

New examples

• #137 -- cx16 file access example -- @XarkLabs

Cleanup

• All SDK files were clang-formatted to LLVM style.
• The SDK now merges in the library from the first ancestor target, not just the parent. This prevents issues like #138 from occurring in the future.