[FIRRTL] Verify widths known for extmodule too.

llvm · Feb 21, 2024 · aa9386a · aa9386a
1 parent 8a0f210
commit aa9386a
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/lib/Dialect/FIRRTL/FIRRTLOpInterfaces.cpp b/lib/Dialect/FIRRTL/FIRRTLOpInterfaces.cpp
@@ -131,16 +131,16 @@ LogicalResult circt::firrtl::verifyModuleLikeOpInterface(FModuleLike module) {
     return failure();
 
   // Enforce public module requirements.
-  if (module.isPublic()) {
+  if (module.isPublic() || isa<FExtModuleOp>(module)) {
     for (auto [idx, type] : llvm::enumerate(
              module.getPortTypesAttr().getAsValueRange<TypeAttr>())) {
       if (auto ftype = dyn_cast<FIRRTLType>(type)) {
         if (ftype.hasUninferredWidth())
           return emitError(module.getPortLocation(idx),
-                           "public module port must have known width");
+                           "public or ext module port must have known width");
         if (ftype.hasUninferredReset())
           return emitError(module.getPortLocation(idx),
-                           "public module port must have concrete reset type");
+                           "public or ext module port must have concrete reset type");
       }
     }
   }