[AMDGPU] Update Call Convention docs for GFX90A

Document the CSR AGPRs for GFX90A.

Remove the TODO for gfx908, as the answer is that we don't mark any
AGPRs as callee-saved except for GFX90A, i.e. the docs as-is are correct
for gfx908.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D109009

llvm/docs/AMDGPUUsage.rst

@@ -10835,6 +10835,7 @@ On exit from a function:
           registers are intermixed at regular intervals in order to keep a
           similar ratio independent of the number of allocated VGPRs.
 
+    * GFX90A: All AGPR registers except the clobbered registers AGPR0-31.
     * Lanes of all VGPRs that are inactive at the call site.
 
       For the AMDGPU backend, an inter-procedural register allocation (IPRA)
@@ -10850,8 +10851,6 @@ On exit from a function:
 
 .. TODO::
 
-  - On gfx908 are all ACC registers clobbered?
-
   - How are function results returned? The address of structured types is passed
     by reference, but what about other types?