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[MIPS] Fix the opcode of max.fmt and mina.fmt (#85609)
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- The opcode of the mina.fmt and max.fmt is documented wrong, the
  object code compiled from the same assembly with LLVM behaves
  differently than one compiled with GCC and Binutils.
- Modify the opcodes to match Binutils. The actual opcodes are as
follows:

  {5,3} | bits {2,0} of func
           |    ...   | 100  | 101    | 110   | 111
  -----+-----+-----+-----+-----+-----
   010  |   ...   |  min  | mina | max  | maxa

(cherry picked from commit 8b859c6)
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@Cyanoxygen @tstellar
Cyanoxygen authored and tstellar committed Apr 17, 2024
1 parent e3c832b commit 028e425
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Showing 7 changed files with 28 additions and 28 deletions.
8 changes: 4 additions & 4 deletions llvm/lib/Target/Mips/Mips32r6InstrInfo.td
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Expand Up @@ -152,15 +152,15 @@ class SELNEZ_ENC : SPECIAL_3R_FM<0b00000, 0b110111>;

class LWPC_ENC : PCREL19_FM<OPCODE2_LWPC>;

class MAX_S_ENC : COP1_3R_FM<0b011101, FIELD_FMT_S>;
class MAX_D_ENC : COP1_3R_FM<0b011101, FIELD_FMT_D>;
class MAX_S_ENC : COP1_3R_FM<0b011110, FIELD_FMT_S>;
class MAX_D_ENC : COP1_3R_FM<0b011110, FIELD_FMT_D>;
class MIN_S_ENC : COP1_3R_FM<0b011100, FIELD_FMT_S>;
class MIN_D_ENC : COP1_3R_FM<0b011100, FIELD_FMT_D>;

class MAXA_S_ENC : COP1_3R_FM<0b011111, FIELD_FMT_S>;
class MAXA_D_ENC : COP1_3R_FM<0b011111, FIELD_FMT_D>;
class MINA_S_ENC : COP1_3R_FM<0b011110, FIELD_FMT_S>;
class MINA_D_ENC : COP1_3R_FM<0b011110, FIELD_FMT_D>;
class MINA_S_ENC : COP1_3R_FM<0b011101, FIELD_FMT_S>;
class MINA_D_ENC : COP1_3R_FM<0b011101, FIELD_FMT_D>;

class SELEQZ_S_ENC : COP1_3R_FM<0b010100, FIELD_FMT_S>;
class SELEQZ_D_ENC : COP1_3R_FM<0b010100, FIELD_FMT_D>;
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8 changes: 4 additions & 4 deletions llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
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Expand Up @@ -116,14 +116,14 @@
0x10 0x08 0x02 0x46 # CHECK: sel.s $f0, $f1, $f2
0x35 0x10 0x64 0x00 # CHECK: seleqz $2, $3, $4
0x37 0x10 0x64 0x00 # CHECK: selnez $2, $3, $4
0x1d 0x10 0x04 0x46 # CHECK: max.s $f0, $f2, $f4
0x1d 0x10 0x24 0x46 # CHECK: max.d $f0, $f2, $f4
0x1c 0x10 0x04 0x46 # CHECK: min.s $f0, $f2, $f4
0x1c 0x10 0x24 0x46 # CHECK: min.d $f0, $f2, $f4
0x1d 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
0x1d 0x10 0x24 0x46 # CHECK: mina.d $f0, $f2, $f4
0x1e 0x10 0x04 0x46 # CHECK: max.s $f0, $f2, $f4
0x1e 0x10 0x24 0x46 # CHECK: max.d $f0, $f2, $f4
0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
0x1e 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
0x1e 0x10 0x24 0x46 # CHECK: mina.d $f0, $f2, $f4
0x04 0x00 0x42 0x34 # CHECK: ori $2, $2, 4
0x14 0x10 0x04 0x46 # CHECK: seleqz.s $f0, $f2, $f4
0x14 0x10 0x24 0x46 # CHECK: seleqz.d $f0, $f2, $f4
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8 changes: 4 additions & 4 deletions llvm/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
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Expand Up @@ -92,8 +92,8 @@
0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4
0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4
0x46 0x04 0x10 0x1d # CHECK: max.s $f0, $f2, $f4
0x46 0x04 0x10 0x1e # CHECK: mina.s $f0, $f2, $f4
0x46 0x04 0x10 0x1d # CHECK: mina.s $f0, $f2, $f4
0x46 0x04 0x10 0x1e # CHECK: max.s $f0, $f2, $f4
0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
0x46 0x04 0x18 0x98 # CHECK: maddf.s $f2, $f3, $f4
0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4
Expand All @@ -103,8 +103,8 @@
0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4
0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4
0x46 0x24 0x10 0x1d # CHECK: max.d $f0, $f2, $f4
0x46 0x24 0x10 0x1e # CHECK: mina.d $f0, $f2, $f4
0x46 0x24 0x10 0x1d # CHECK: mina.d $f0, $f2, $f4
0x46 0x24 0x10 0x1e # CHECK: max.d $f0, $f2, $f4
0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
0x46 0x24 0x18 0x98 # CHECK: maddf.d $f2, $f3, $f4
0x46 0x24 0x18 0x99 # CHECK: msubf.d $f2, $f3, $f4
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8 changes: 4 additions & 4 deletions llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
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Expand Up @@ -140,15 +140,15 @@
0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
0x98 0x18 0x24 0x46 # CHECK: maddf.d $f2, $f3, $f4
0x98 0x18 0x04 0x46 # CHECK: maddf.s $f2, $f3, $f4
0x1d 0x10 0x24 0x46 # CHECK: max.d $f0, $f2, $f4
0x1d 0x10 0x04 0x46 # CHECK: max.s $f0, $f2, $f4
0x1e 0x10 0x24 0x46 # CHECK: max.d $f0, $f2, $f4
0x1e 0x10 0x04 0x46 # CHECK: max.s $f0, $f2, $f4
0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
0x01 0x78 0x08 0x40 # CHECK: mfc0 $8, $15, 1
0x1c 0x10 0x24 0x46 # CHECK: min.d $f0, $f2, $f4
0x1c 0x10 0x04 0x46 # CHECK: min.s $f0, $f2, $f4
0x1e 0x10 0x24 0x46 # CHECK: mina.d $f0, $f2, $f4
0x1e 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
0x1d 0x10 0x24 0x46 # CHECK: mina.d $f0, $f2, $f4
0x1d 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
0xda 0x10 0x64 0x00 # CHECK: mod $2, $3, $4
0xdb 0x10 0x64 0x00 # CHECK: modu $2, $3, $4
0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
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8 changes: 4 additions & 4 deletions llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
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Expand Up @@ -111,8 +111,8 @@
0x46 0x04 0x10 0x14 # CHECK: seleqz.s $f0, $f2, $f4
0x46 0x04 0x10 0x17 # CHECK: selnez.s $f0, $f2, $f4
0x46 0x04 0x10 0x1c # CHECK: min.s $f0, $f2, $f4
0x46 0x04 0x10 0x1d # CHECK: max.s $f0, $f2, $f4
0x46 0x04 0x10 0x1e # CHECK: mina.s $f0, $f2, $f4
0x46 0x04 0x10 0x1d # CHECK: mina.s $f0, $f2, $f4
0x46 0x04 0x10 0x1e # CHECK: max.s $f0, $f2, $f4
0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
0x46 0x04 0x18 0x98 # CHECK: maddf.s $f2, $f3, $f4
0x46 0x04 0x18 0x99 # CHECK: msubf.s $f2, $f3, $f4
Expand All @@ -122,8 +122,8 @@
0x46 0x24 0x10 0x14 # CHECK: seleqz.d $f0, $f2, $f4
0x46 0x24 0x10 0x17 # CHECK: selnez.d $f0, $f2, $f4
0x46 0x24 0x10 0x1c # CHECK: min.d $f0, $f2, $f4
0x46 0x24 0x10 0x1d # CHECK: max.d $f0, $f2, $f4
0x46 0x24 0x10 0x1e # CHECK: mina.d $f0, $f2, $f4
0x46 0x24 0x10 0x1d # CHECK: mina.d $f0, $f2, $f4
0x46 0x24 0x10 0x1e # CHECK: max.d $f0, $f2, $f4
0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
0x46 0x24 0x18 0x98 # CHECK: maddf.d $f2, $f3, $f4
0x46 0x24 0x18 0x99 # CHECK: msubf.d $f2, $f3, $f4
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8 changes: 4 additions & 4 deletions llvm/test/MC/Mips/mips32r6/valid.s
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Expand Up @@ -170,14 +170,14 @@ a:
sel.s $f0,$f1,$f2 # CHECK: sel.s $f0, $f1, $f2 # encoding: [0x46,0x02,0x08,0x10]
seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x64,0x10,0x35]
selnez $2,$3,$4 # CHECK: selnez $2, $3, $4 # encoding: [0x00,0x64,0x10,0x37]
max.s $f0, $f2, $f4 # CHECK: max.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1d]
max.d $f0, $f2, $f4 # CHECK: max.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1d]
max.s $f0, $f2, $f4 # CHECK: max.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1e]
max.d $f0, $f2, $f4 # CHECK: max.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1e]
min.s $f0, $f2, $f4 # CHECK: min.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1c]
min.d $f0, $f2, $f4 # CHECK: min.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1c]
maxa.s $f0, $f2, $f4 # CHECK: maxa.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1f]
maxa.d $f0, $f2, $f4 # CHECK: maxa.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1f]
mina.s $f0, $f2, $f4 # CHECK: mina.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1e]
mina.d $f0, $f2, $f4 # CHECK: mina.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1e]
mina.s $f0, $f2, $f4 # CHECK: mina.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1d]
mina.d $f0, $f2, $f4 # CHECK: mina.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1d]
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
seleqz.s $f0, $f2, $f4 # CHECK: seleqz.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x14]
seleqz.d $f0, $f2, $f4 # CHECK: seleqz.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x14]
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8 changes: 4 additions & 4 deletions llvm/test/MC/Mips/mips64r6/valid.s
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Expand Up @@ -183,14 +183,14 @@ a:
lwupc $2,268 # CHECK: lwupc $2, 268 # encoding: [0xec,0x50,0x00,0x43]
maddf.d $f2,$f3,$f4 # CHECK: maddf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x98]
maddf.s $f2,$f3,$f4 # CHECK: maddf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x98]
max.d $f0, $f2, $f4 # CHECK: max.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1d]
max.s $f0, $f2, $f4 # CHECK: max.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1d]
max.d $f0, $f2, $f4 # CHECK: max.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1e]
max.s $f0, $f2, $f4 # CHECK: max.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1e]
maxa.d $f0, $f2, $f4 # CHECK: maxa.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1f]
maxa.s $f0, $f2, $f4 # CHECK: maxa.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1f]
min.d $f0, $f2, $f4 # CHECK: min.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1c]
min.s $f0, $f2, $f4 # CHECK: min.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1c]
mina.d $f0, $f2, $f4 # CHECK: mina.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1e]
mina.s $f0, $f2, $f4 # CHECK: mina.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1e]
mina.d $f0, $f2, $f4 # CHECK: mina.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x1d]
mina.s $f0, $f2, $f4 # CHECK: mina.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x1d]
mfc0 $8,$15,1 # CHECK: mfc0 $8, $15, 1 # encoding: [0x40,0x08,0x78,0x01]
mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda]
modu $2,$3,$4 # CHECK: modu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdb]
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