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[M68k] Provide exception pointer and selector registers
Using d0 for exception pointer and d1 for selector, as suggested by GCC.
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | ||
; RUN: llc -mtriple=m68k < %s | FileCheck %s | ||
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; (Copied from test/CodeGen/X86/gcc_except_table.ll) | ||
; Testing whether exception pointer register (d0) and exception selector | ||
; register (d1) are correctly used by landing and EH pad, respectively. | ||
@_ZTIi = external constant ptr | ||
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define i32 @foo() uwtable ssp personality ptr @__gxx_personality_v0 { | ||
; CHECK-LABEL: foo: | ||
; CHECK: .Lfunc_begin0: | ||
; CHECK-NEXT: .cfi_startproc | ||
; CHECK-NEXT: .cfi_personality 0, __gxx_personality_v0 | ||
; CHECK-NEXT: .cfi_lsda 0, .Lexception0 | ||
; CHECK-NEXT: ; %bb.0: ; %entry | ||
; CHECK-NEXT: suba.l #4, %sp | ||
; CHECK-NEXT: .cfi_def_cfa_offset -8 | ||
; CHECK-NEXT: .Ltmp0: | ||
; CHECK-NEXT: jsr _Z1fv@PLT | ||
; CHECK-NEXT: .Ltmp1: | ||
; CHECK-NEXT: ; %bb.1: ; %try.cont | ||
; CHECK-NEXT: move.l #0, %d0 | ||
; CHECK-NEXT: adda.l #4, %sp | ||
; CHECK-NEXT: rts | ||
; CHECK-NEXT: .LBB0_2: ; %lpad | ||
; CHECK-NEXT: .Ltmp2: | ||
; CHECK-NEXT: move.l %d0, (%sp) | ||
; CHECK-NEXT: jsr _Unwind_Resume@PLT | ||
entry: | ||
invoke void @_Z1fv() optsize | ||
to label %try.cont unwind label %lpad | ||
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lpad: | ||
%0 = landingpad { ptr, i32 } | ||
cleanup | ||
catch ptr @_ZTIi | ||
br label %eh.resume | ||
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try.cont: | ||
ret i32 0 | ||
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eh.resume: | ||
resume { ptr, i32 } %0 | ||
} | ||
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declare void @_Z1fv() optsize | ||
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declare i32 @__gxx_personality_v0(...) |