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UpdateTestChecks: arm64-eabi handlind
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Summary:
Was looking into supporting `(srl (shl x, c1), c2)` with c1 != c2 in dagcombiner,
this test changes, but makes `update_llc_test_checks.py` unhappy

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62097

llvm-svn: 361100
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@LebedevRI @MrSidims
LebedevRI authored and MrSidims committed May 24, 2019
1 parent f285c8a commit 07161b2
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