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[DAG] getNode() - fold (zext (trunc (assertzext x))) -> (assertzext x)
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If the pre-truncated value was the same width as the extension, and the assertzext guarantees that the extended bits are already zero, then skip the zext/trunc 'zero_extend_inreg' pattern.

Addresses several regressions noticed in D155472
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@RKSimon
RKSimon committed Jul 31, 2023
1 parent 60b9836 commit 076bee1
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Showing 3 changed files with 39 additions and 27 deletions.
16 changes: 16 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5691,6 +5691,22 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
if (OpOpcode == ISD::UNDEF)
// zext(undef) = 0, because the top bits will be zero.
return getConstant(0, DL, VT);

// Skip unnecessary zext_inreg pattern:
// (zext (trunc (assertzext x))) -> (assertzext x)
// TODO: Generalize to MaskedValueIsZero check?
if (OpOpcode == ISD::TRUNCATE) {
SDValue OpOp = N1.getOperand(0);
if (OpOp.getValueType() == VT) {
if (OpOp.getOpcode() == ISD::AssertZext && N1->hasOneUse()) {
EVT ExtVT = cast<VTSDNode>(OpOp.getOperand(1))->getVT();
if (N1.getScalarValueSizeInBits() >= ExtVT.getSizeInBits()) {
transferDbgValues(N1, OpOp);
return OpOp;
}
}
}
}
break;
case ISD::ANY_EXTEND:
assert(VT.isInteger() && N1.getValueType().isInteger() &&
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/RISCV/rvv/fold-vp-fadd-and-vp-fmul.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -62,9 +62,9 @@ define <vscale x 1 x double> @fma_reassociate(<vscale x 1 x double> %a, <vscale
; CHECK-LABEL: fma_reassociate:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
; CHECK-NEXT: vfmadd.vv v11, v10, v12, v0.t
; CHECK-NEXT: vfmadd.vv v9, v8, v11, v0.t
; CHECK-NEXT: vmv.v.v v8, v9
; CHECK-NEXT: vfmadd.vv v9, v8, v12, v0.t
; CHECK-NEXT: vfmadd.vv v11, v10, v9, v0.t
; CHECK-NEXT: vmv.v.v v8, v11
; CHECK-NEXT: ret
%1 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %vl)
%2 = call fast <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %c, <vscale x 1 x double> %d, <vscale x 1 x i1> %m, i32 %vl)
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44 changes: 20 additions & 24 deletions llvm/test/CodeGen/X86/extract-bits.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -210,9 +210,8 @@ define i32 @bextr32_a1_indexzext(i32 %val, i8 zeroext %numskipbits, i8 zeroext %
; X64-BMI1-LABEL: bextr32_a1_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrl %eax, %edi, %eax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrl %edx, %edi, %eax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr32_a1_indexzext:
Expand Down Expand Up @@ -351,9 +350,8 @@ define i32 @bextr32_a3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
; X64-BMI1-LABEL: bextr32_a3_load_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrl %eax, (%rdi), %eax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrl %edx, (%rdi), %eax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr32_a3_load_indexzext:
Expand Down Expand Up @@ -953,10 +951,10 @@ define i64 @bextr64_a1_indexzext(i64 %val, i8 zeroext %numskipbits, i8 zeroext %
;
; X64-BMI1-LABEL: bextr64_a1_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrq %rax, %rdi, %rax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrq %rdx, %rdi, %rax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr64_a1_indexzext:
Expand Down Expand Up @@ -1250,10 +1248,10 @@ define i64 @bextr64_a3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
;
; X64-BMI1-LABEL: bextr64_a3_load_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrq %rax, (%rdi), %rax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrq %rdx, (%rdi), %rax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr64_a3_load_indexzext:
Expand Down Expand Up @@ -2327,9 +2325,8 @@ define i32 @bextr32_b1_indexzext(i32 %val, i8 zeroext %numskipbits, i8 zeroext %
; X64-BMI1-LABEL: bextr32_b1_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrl %eax, %edi, %eax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrl %edx, %edi, %eax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr32_b1_indexzext:
Expand Down Expand Up @@ -2468,9 +2465,8 @@ define i32 @bextr32_b3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
; X64-BMI1-LABEL: bextr32_b3_load_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrl %eax, (%rdi), %eax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrl %edx, (%rdi), %eax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr32_b3_load_indexzext:
Expand Down Expand Up @@ -2916,10 +2912,10 @@ define i64 @bextr64_b1_indexzext(i64 %val, i8 zeroext %numskipbits, i8 zeroext %
;
; X64-BMI1-LABEL: bextr64_b1_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrq %rax, %rdi, %rax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrq %rdx, %rdi, %rax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr64_b1_indexzext:
Expand Down Expand Up @@ -3205,10 +3201,10 @@ define i64 @bextr64_b3_load_indexzext(ptr %w, i8 zeroext %numskipbits, i8 zeroex
;
; X64-BMI1-LABEL: bextr64_b3_load_indexzext:
; X64-BMI1: # %bb.0:
; X64-BMI1-NEXT: # kill: def $edx killed $edx def $rdx
; X64-BMI1-NEXT: shll $8, %edx
; X64-BMI1-NEXT: movzbl %sil, %eax
; X64-BMI1-NEXT: orl %edx, %eax
; X64-BMI1-NEXT: bextrq %rax, (%rdi), %rax
; X64-BMI1-NEXT: orl %esi, %edx
; X64-BMI1-NEXT: bextrq %rdx, (%rdi), %rax
; X64-BMI1-NEXT: retq
;
; X64-BMI2-LABEL: bextr64_b3_load_indexzext:
Expand Down

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