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[ARM GlobalISel] Widen G_SELECT operands
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...except for the condition operand.

llvm-svn: 360135
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rovka committed May 7, 2019
1 parent b0f5126 commit 0a47fb8
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Showing 2 changed files with 74 additions and 2 deletions.
5 changes: 3 additions & 2 deletions llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
Expand Up @@ -129,8 +129,9 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) {
.legalForCartesianProduct({s1}, {s32, p0})
.minScalar(1, s32);

getActionDefinitionsBuilder(G_SELECT).legalForCartesianProduct({s32, p0},
{s1});
getActionDefinitionsBuilder(G_SELECT)
.legalForCartesianProduct({s32, p0}, {s1})
.minScalar(0, s32);

// We're keeping these builders around because we'll want to add support for
// floating point to them.
Expand Down
71 changes: 71 additions & 0 deletions llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-select.mir
Expand Up @@ -3,6 +3,9 @@
--- |
define void @test_select_s32() { ret void }
define void @test_select_ptr() { ret void }

define void @test_select_s16() { ret void }
define void @test_select_s8() { ret void }
...
---
name: test_select_s32
Expand Down Expand Up @@ -56,3 +59,71 @@ body: |
$r0 = COPY %3(p0)
BX_RET 14, $noreg, implicit $r0
...
---
name: test_select_s16
# CHECK-LABEL: name: test_select_s16
legalized: false
# CHECK: legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: $r0, $r1, $r2
%0(s32) = COPY $r0
%1(s16) = G_TRUNC %0(s32)
%2(s32) = COPY $r1
%3(s16) = G_TRUNC %2(s32)
%4(s1) = G_CONSTANT i1 1
%5(s16) = G_SELECT %4(s1), %1, %3
; G_SELECT with s16 should extend
; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
; CHECK: {{%[0-9]+}}:_(s32) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
; CHECK-NOT: {{%[0-9]+}}:_(s16) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
%6(s32) = G_SEXT %5(s16)
$r0 = COPY %6(s32)
BX_RET 14, $noreg, implicit $r0
...
---
name: test_select_s8
# CHECK-LABEL: name: test_select_s8
legalized: false
# CHECK: legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
- { id: 6, class: _ }
body: |
bb.0:
liveins: $r0, $r1, $r2
%0(s32) = COPY $r0
%1(s8) = G_TRUNC %0(s32)
%2(s32) = COPY $r1
%3(s8) = G_TRUNC %2(s32)
%4(s1) = G_CONSTANT i1 1
%5(s8) = G_SELECT %4(s1), %1, %3
; G_SELECT with s8 should extend
; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
; CHECK: {{%[0-9]+}}:_(s32) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
; CHECK-NOT: {{%[0-9]+}}:_(s8) = G_SELECT {{%[0-9]+}}(s1), {{%[0-9]+}}, {{%[0-9]+}}
%6(s32) = G_SEXT %5(s8)
$r0 = COPY %6(s32)
BX_RET 14, $noreg, implicit $r0
...

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