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[RISCV] Fix disassembling of fence instruction with invalid field
Summary: Instruction with 0 in fence field being disassembled as fence , iorw. Printing "unknown" to match GAS behavior. This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer for the RISC-V assembly language. Reviewers: asb Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, jfb, PkmX, jocewei, asb Differential Revision: https://reviews.llvm.org/D51828 llvm-svn: 344309
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Ana Pazos
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Oct 11, 2018
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,9 @@ | ||
# RUN: llvm-mc -disassemble -triple=riscv32 < %s 2>&1 | FileCheck %s | ||
# RUN: llvm-mc -disassemble -triple=riscv64 < %s 2>&1 | FileCheck %s | ||
# | ||
# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer | ||
# for the RISC-V assembly language. | ||
|
||
# This decodes as fence , iorw with invalid fence field as 0. | ||
[0x0f 0x00 0xf0 0x00] | ||
# CHECK: fence unknown, iorw |
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