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[AArch64][SVE2] Asm: support WHILE instructions
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Summary:
Patch adds support for the following instructions:
    * WHILEGE, WHILEGT, WHILEHS, WHILEHI, WHILEWR, WHILERW

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62601

llvm-svn: 362215
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@c-rhodes
c-rhodes committed May 31, 2019
1 parent 087d133 commit 0fc3a07
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15 changes: 15 additions & 0 deletions llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
View file
Expand Up @@ -1371,6 +1371,21 @@ let Predicates = [HasSVE2] in {
// SVE table lookup (three sources)
defm TBL_ZZZZ : sve2_int_perm_tbl<"tbl">;
defm TBX_ZZZ : sve2_int_perm_tbx<"tbx">;

// SVE integer compare scalar count and limit
defm WHILEGE_PWW : sve_int_while4_rr<0b000, "whilege">;
defm WHILEGT_PWW : sve_int_while4_rr<0b001, "whilegt">;
defm WHILEHS_PWW : sve_int_while4_rr<0b100, "whilehs">;
defm WHILEHI_PWW : sve_int_while4_rr<0b101, "whilehi">;

defm WHILEGE_PXX : sve_int_while8_rr<0b000, "whilege">;
defm WHILEGT_PXX : sve_int_while8_rr<0b001, "whilegt">;
defm WHILEHS_PXX : sve_int_while8_rr<0b100, "whilehs">;
defm WHILEHI_PXX : sve_int_while8_rr<0b101, "whilehi">;

// SVE pointer conflict compare
defm WHILEWR_PXX : sve2_int_while_rr<0b0, "whilewr">;
defm WHILERW_PXX : sve2_int_while_rr<0b1, "whilerw">;
}

let Predicates = [HasSVE2AES] in {
Expand Down
26 changes: 26 additions & 0 deletions llvm/lib/Target/AArch64/SVEInstrFormats.td
View file
Expand Up @@ -3270,6 +3270,32 @@ multiclass sve_int_while8_rr<bits<3> opc, string asm> {
def _D : sve_int_while_rr<0b11, { 1, opc }, asm, GPR64, PPR64>;
}

class sve2_int_while_rr<bits<2> sz8_64, bits<1> rw, string asm,
PPRRegOp pprty>
: I<(outs pprty:$Pd), (ins GPR64:$Rn, GPR64:$Rm),
asm, "\t$Pd, $Rn, $Rm",
"", []>, Sched<[]> {
bits<4> Pd;
bits<5> Rm;
bits<5> Rn;
let Inst{31-24} = 0b00100101;
let Inst{23-22} = sz8_64;
let Inst{21} = 0b1;
let Inst{20-16} = Rm;
let Inst{15-10} = 0b001100;
let Inst{9-5} = Rn;
let Inst{4} = rw;
let Inst{3-0} = Pd;

let Defs = [NZCV];
}

multiclass sve2_int_while_rr<bits<1> rw, string asm> {
def _B : sve2_int_while_rr<0b00, rw, asm, PPR8>;
def _H : sve2_int_while_rr<0b01, rw, asm, PPR16>;
def _S : sve2_int_while_rr<0b10, rw, asm, PPR32>;
def _D : sve2_int_while_rr<0b11, rw, asm, PPR64>;
}

//===----------------------------------------------------------------------===//
// SVE Floating Point Fast Reduction Group
Expand Down
29 changes: 29 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilege-diagnostics.s
View file
@@ -0,0 +1,29 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s


// ------------------------------------------------------------------------- //
// Invalid scalar registers

whilege p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilege p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilege p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilege p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilege p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilege p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:


// ------------------------------------------------------------------------- //
// Invalid predicate

whilege p15, w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
// CHECK-NEXT: whilege p15, w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
68 changes: 68 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilege.s
View file
@@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN

whilege p15.b, xzr, x0
// CHECK-INST: whilege p15.b, xzr, x0
// CHECK-ENCODING: [0xef,0x13,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ef 13 20 25 <unknown>

whilege p15.b, x0, xzr
// CHECK-INST: whilege p15.b, x0, xzr
// CHECK-ENCODING: [0x0f,0x10,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 10 3f 25 <unknown>

whilege p15.b, wzr, w0
// CHECK-INST: whilege p15.b, wzr, w0
// CHECK-ENCODING: [0xef,0x03,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ef 03 20 25 <unknown>

whilege p15.b, w0, wzr
// CHECK-INST: whilege p15.b, w0, wzr
// CHECK-ENCODING: [0x0f,0x00,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 00 3f 25 <unknown>

whilege p15.h, x0, xzr
// CHECK-INST: whilege p15.h, x0, xzr
// CHECK-ENCODING: [0x0f,0x10,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 10 7f 25 <unknown>

whilege p15.h, w0, wzr
// CHECK-INST: whilege p15.h, w0, wzr
// CHECK-ENCODING: [0x0f,0x00,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 00 7f 25 <unknown>

whilege p15.s, x0, xzr
// CHECK-INST: whilege p15.s, x0, xzr
// CHECK-ENCODING: [0x0f,0x10,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 10 bf 25 <unknown>

whilege p15.s, w0, wzr
// CHECK-INST: whilege p15.s, w0, wzr
// CHECK-ENCODING: [0x0f,0x00,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 00 bf 25 <unknown>

whilege p15.d, w0, wzr
// CHECK-INST: whilege p15.d, w0, wzr
// CHECK-ENCODING: [0x0f,0x00,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 00 ff 25 <unknown>

whilege p15.d, x0, xzr
// CHECK-INST: whilege p15.d, x0, xzr
// CHECK-ENCODING: [0x0f,0x10,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 0f 10 ff 25 <unknown>
29 changes: 29 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilegt-diagnostics.s
View file
@@ -0,0 +1,29 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s


// ------------------------------------------------------------------------- //
// Invalid scalar registers

whilegt p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilegt p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilegt p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilegt p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilegt p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilegt p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:


// ------------------------------------------------------------------------- //
// Invalid predicate

whilegt p15, w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
// CHECK-NEXT: whilegt p15, w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
68 changes: 68 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilegt.s
View file
@@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN

whilegt p15.b, xzr, x0
// CHECK-INST: whilegt p15.b, xzr, x0
// CHECK-ENCODING: [0xff,0x13,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ff 13 20 25 <unknown>

whilegt p15.b, x0, xzr
// CHECK-INST: whilegt p15.b, x0, xzr
// CHECK-ENCODING: [0x1f,0x10,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 10 3f 25 <unknown>

whilegt p15.b, wzr, w0
// CHECK-INST: whilegt p15.b, wzr, w0
// CHECK-ENCODING: [0xff,0x03,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ff 03 20 25 <unknown>

whilegt p15.b, w0, wzr
// CHECK-INST: whilegt p15.b, w0, wzr
// CHECK-ENCODING: [0x1f,0x00,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 00 3f 25 <unknown>

whilegt p15.h, x0, xzr
// CHECK-INST: whilegt p15.h, x0, xzr
// CHECK-ENCODING: [0x1f,0x10,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 10 7f 25 <unknown>

whilegt p15.h, w0, wzr
// CHECK-INST: whilegt p15.h, w0, wzr
// CHECK-ENCODING: [0x1f,0x00,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 00 7f 25 <unknown>

whilegt p15.s, x0, xzr
// CHECK-INST: whilegt p15.s, x0, xzr
// CHECK-ENCODING: [0x1f,0x10,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 10 bf 25 <unknown>

whilegt p15.s, w0, wzr
// CHECK-INST: whilegt p15.s, w0, wzr
// CHECK-ENCODING: [0x1f,0x00,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 00 bf 25 <unknown>

whilegt p15.d, w0, wzr
// CHECK-INST: whilegt p15.d, w0, wzr
// CHECK-ENCODING: [0x1f,0x00,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 00 ff 25 <unknown>

whilegt p15.d, x0, xzr
// CHECK-INST: whilegt p15.d, x0, xzr
// CHECK-ENCODING: [0x1f,0x10,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 10 ff 25 <unknown>
29 changes: 29 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilehi-diagnostics.s
View file
@@ -0,0 +1,29 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s


// ------------------------------------------------------------------------- //
// Invalid scalar registers

whilehi p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehi p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilehi p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehi p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilehi p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehi p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:


// ------------------------------------------------------------------------- //
// Invalid predicate

whilehi p15, w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
// CHECK-NEXT: whilehi p15, w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
68 changes: 68 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilehi.s
View file
@@ -0,0 +1,68 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN

whilehi p15.b, xzr, x0
// CHECK-INST: whilehi p15.b, xzr, x0
// CHECK-ENCODING: [0xff,0x1b,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ff 1b 20 25 <unknown>

whilehi p15.b, x0, xzr
// CHECK-INST: whilehi p15.b, x0, xzr
// CHECK-ENCODING: [0x1f,0x18,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 18 3f 25 <unknown>

whilehi p15.b, wzr, w0
// CHECK-INST: whilehi p15.b, wzr, w0
// CHECK-ENCODING: [0xff,0x0b,0x20,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: ff 0b 20 25 <unknown>

whilehi p15.b, w0, wzr
// CHECK-INST: whilehi p15.b, w0, wzr
// CHECK-ENCODING: [0x1f,0x08,0x3f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 08 3f 25 <unknown>

whilehi p15.h, x0, xzr
// CHECK-INST: whilehi p15.h, x0, xzr
// CHECK-ENCODING: [0x1f,0x18,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 18 7f 25 <unknown>

whilehi p15.h, w0, wzr
// CHECK-INST: whilehi p15.h, w0, wzr
// CHECK-ENCODING: [0x1f,0x08,0x7f,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 08 7f 25 <unknown>

whilehi p15.s, x0, xzr
// CHECK-INST: whilehi p15.s, x0, xzr
// CHECK-ENCODING: [0x1f,0x18,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 18 bf 25 <unknown>

whilehi p15.s, w0, wzr
// CHECK-INST: whilehi p15.s, w0, wzr
// CHECK-ENCODING: [0x1f,0x08,0xbf,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 08 bf 25 <unknown>

whilehi p15.d, w0, wzr
// CHECK-INST: whilehi p15.d, w0, wzr
// CHECK-ENCODING: [0x1f,0x08,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 08 ff 25 <unknown>

whilehi p15.d, x0, xzr
// CHECK-INST: whilehi p15.d, x0, xzr
// CHECK-ENCODING: [0x1f,0x18,0xff,0x25]
// CHECK-ERROR: instruction requires: sve2
// CHECK-UNKNOWN: 1f 18 ff 25 <unknown>
29 changes: 29 additions & 0 deletions llvm/test/MC/AArch64/SVE2/whilehs-diagnostics.s
View file
@@ -0,0 +1,29 @@
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s


// ------------------------------------------------------------------------- //
// Invalid scalar registers

whilehs p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehs p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilehs p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehs p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

whilehs p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilehs p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:


// ------------------------------------------------------------------------- //
// Invalid predicate

whilehs p15, w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register.
// CHECK-NEXT: whilehs p15, w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

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