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[mips] Range check uimm16_64
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Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D17725

llvm-svn: 263427
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dsandersllvm committed Mar 14, 2016
1 parent e641cb4 commit 127d2d2
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Showing 2 changed files with 14 additions and 7 deletions.
15 changes: 8 additions & 7 deletions llvm/lib/Target/Mips/MipsInstrInfo.td
Expand Up @@ -658,7 +658,7 @@ def uimm6_lsl2 : Operand<OtherVT> {

foreach I = {16} in
def uimm # I : Operand<i32> {
let PrintMethod = "printUImm<16>";
let PrintMethod = "printUImm<" # I # ">";
let ParserMatchClass =
!cast<AsmOperandClass>("UImm" # I # "AsmOperandClass");
}
Expand All @@ -672,16 +672,17 @@ def uimm16_relaxed : Operand<i32> {

foreach I = {5} in
def uimm # I # _64 : Operand<i64> {
let PrintMethod = "printUImm<5>";
let PrintMethod = "printUImm<" # I # ">";
let ParserMatchClass =
!cast<AsmOperandClass>("ConstantUImm" # I # "AsmOperandClass");
}

def uimm16_64 : Operand<i64> {
let PrintMethod = "printUImm<16>";
let ParserMatchClass =
!cast<AsmOperandClass>("UImm16AsmOperandClass");
}
foreach I = {16} in
def uimm # I # _64 : Operand<i64> {
let PrintMethod = "printUImm<" # I # ">";
let ParserMatchClass =
!cast<AsmOperandClass>("UImm" # I # "AsmOperandClass");
}

// Like uimm16_64 but coerces simm16 to uimm16.
def uimm16_64_relaxed : Operand<i64> {
Expand Down
6 changes: 6 additions & 0 deletions llvm/test/MC/Mips/mips64r2/invalid.s
Expand Up @@ -6,6 +6,8 @@

.text
.set noreorder
andi $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate
andi $2, $3, 65536 # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate
cache -1, 255($7) # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
cache 32, 255($7) # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
# FIXME: Check various 'pos + size' constraints on dext*
Expand Down Expand Up @@ -56,6 +58,8 @@
ins $2, $3, 32, 1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate
jalr.hb $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
jalr.hb $31, $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
ori $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 16-bit unsigned immediate
ori $2, $3, 65536 # CHECK: :[[@LINE]]:21: error: expected 16-bit unsigned immediate
pref -1, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
pref 32, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
sll $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate
Expand All @@ -66,3 +70,5 @@
sra $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate
rotr $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate
rotr $2, $3, 32 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate
xori $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate
xori $2, $3, 65536 # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate

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