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AMDGPU: Factor out fneg fold predicate function
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arsenm committed Feb 3, 2023
1 parent 36cfe26 commit 149e8ab
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Showing 2 changed files with 20 additions and 8 deletions.
27 changes: 19 additions & 8 deletions llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Expand Up @@ -3862,12 +3862,9 @@ static unsigned inverseMinMax(unsigned Opc) {
}
}

SDValue AMDGPUTargetLowering::performFNegCombine(SDNode *N,
DAGCombinerInfo &DCI) const {
SelectionDAG &DAG = DCI.DAG;
SDValue N0 = N->getOperand(0);
EVT VT = N->getValueType(0);

/// \return true if it's profitable to try to push an fneg into its source
/// instruction.
bool AMDGPUTargetLowering::shouldFoldFNegIntoSrc(SDNode *N, SDValue N0) {
unsigned Opc = N0.getOpcode();

// If the input has multiple uses and we can either fold the negate down, or
Expand All @@ -3878,13 +3875,27 @@ SDValue AMDGPUTargetLowering::performFNegCombine(SDNode *N,
// This may be able to fold into the source, but at a code size cost. Don't
// fold if the fold into the user is free.
if (allUsesHaveSourceMods(N, 0))
return SDValue();
return false;
} else {
if (fnegFoldsIntoOp(Opc) &&
(allUsesHaveSourceMods(N) || !allUsesHaveSourceMods(N0.getNode())))
return SDValue();
return false;
}

return true;
}

SDValue AMDGPUTargetLowering::performFNegCombine(SDNode *N,
DAGCombinerInfo &DCI) const {
SelectionDAG &DAG = DCI.DAG;
SDValue N0 = N->getOperand(0);
EVT VT = N->getValueType(0);

unsigned Opc = N0.getOpcode();

if (!shouldFoldFNegIntoSrc(N, N0))
return SDValue();

SDLoc SL(N);
switch (Opc) {
case ISD::FADD: {
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1 change: 1 addition & 0 deletions llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Expand Up @@ -156,6 +156,7 @@ class AMDGPUTargetLowering : public TargetLowering {
return Val.getOpcode() == ISD::BITCAST ? Val.getOperand(0) : Val;
}

static bool shouldFoldFNegIntoSrc(SDNode *FNeg, SDValue FNegSrc);
static bool allUsesHaveSourceMods(const SDNode *N,
unsigned CostThreshold = 4);
bool isFAbsFree(EVT VT) const override;
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