AMDGPU/SI: Add support for R_AMDGPU_ABS32

Differential Revision: https://reviews.llvm.org/D21646 llvm-svn: 276294
llvm · Jul 21, 2016 · 1556262 · 1556262
1 parent 4ff2e36
commit 1556262
Show file tree

Hide file tree

Showing 3 changed files with 18 additions and 0 deletions.
diff --git a/llvm/include/llvm/Object/RelocVisitor.h b/llvm/include/llvm/Object/RelocVisitor.h
@@ -139,6 +139,14 @@ class RelocVisitor {
           HasError = true;
           return RelocToApply();
         }
+      case Triple::amdgcn:
+        switch (RelocType) {
+        case llvm::ELF::R_AMDGPU_ABS32:
+          return visitELF_AMDGPU_ABS32(R, Value);
+        default:
+          HasError = true;
+          return RelocToApply();
+        }
       default:
         HasError = true;
         return RelocToApply();
@@ -403,6 +411,11 @@ class RelocVisitor {
     return RelocToApply(static_cast<uint32_t>(Res), 4);
   }
 
+  RelocToApply visitELF_AMDGPU_ABS32(RelocationRef R, uint64_t Value) {
+    int64_t Addend = getELFAddend(R);
+    return RelocToApply(Value + Addend, 4);
+  }
+
   /// I386 COFF
   RelocToApply visitCOFF_I386_SECREL(RelocationRef R, uint64_t Value) {
     return RelocToApply(static_cast<uint32_t>(Value), /*Width=*/4);

diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -56,6 +56,7 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
   default: break;
   case FK_PCRel_4:
     return ELF::R_AMDGPU_REL32;
+  case FK_Data_4:
   case FK_SecRel_4:
     return ELF::R_AMDGPU_ABS32;
   }

diff --git a/llvm/test/MC/AMDGPU/reloc.s b/llvm/test/MC/AMDGPU/reloc.s
@@ -4,6 +4,7 @@
 // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
 // CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
 // CHECK: R_AMDGPU_GOTPCREL global_var 0x0
+// CHECK: R_AMDGPU_ABS32 var 0x0
 // CHECK: ]
 
 kernel:
@@ -14,3 +15,6 @@ kernel:
 .globl global_var
 
 .globl SCRATCH_RSRC_DWORD0
+
+.section nonalloc, "w", @progbits
+  .long var, common_var