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[X86] bypass-slow-division-64.ll - add udiv+urem test coverage
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@RKSimon
RKSimon committed May 5, 2024
1 parent c6e4f63 commit 176be3e
Showing 1 changed file with 198 additions and 21 deletions.
219 changes: 198 additions & 21 deletions llvm/test/CodeGen/X86/bypass-slow-division-64.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -27,15 +27,19 @@

; Additional tests for 64-bit divide bypass

define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: Test_get_quotient:
;
; SDIV
;

define i64 @sdiv_quotient(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: sdiv_quotient:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: cqto
; FAST-DIVQ-NEXT: idivq %rsi
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: Test_get_quotient:
; SLOW-DIVQ-LABEL: sdiv_quotient:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
Expand All @@ -56,8 +60,8 @@ define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind {
ret i64 %result
}

define i64 @Test_get_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: Test_get_quotient_optsize:
define i64 @sdiv_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: sdiv_quotient_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -67,8 +71,8 @@ define i64 @Test_get_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
ret i64 %result
}

define i64 @Test_get_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: Test_get_quotient_minsize:
define i64 @sdiv_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: sdiv_quotient_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -78,16 +82,16 @@ define i64 @Test_get_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
ret i64 %result
}

define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: Test_get_remainder:
define i64 @sdiv_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: sdiv_remainder:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: cqto
; FAST-DIVQ-NEXT: idivq %rsi
; FAST-DIVQ-NEXT: movq %rdx, %rax
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: Test_get_remainder:
; SLOW-DIVQ-LABEL: sdiv_remainder:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
Expand All @@ -109,8 +113,8 @@ define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
ret i64 %result
}

define i64 @Test_get_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: Test_get_remainder_optsize:
define i64 @sdiv_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: sdiv_remainder_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -121,8 +125,8 @@ define i64 @Test_get_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
ret i64 %result
}

define i64 @Test_get_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: Test_get_remainder_minsize:
define i64 @sdiv_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: sdiv_remainder_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -133,16 +137,16 @@ define i64 @Test_get_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
ret i64 %result
}

define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: Test_get_quotient_and_remainder:
define i64 @sdiv_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: sdiv_quotient_and_remainder:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: cqto
; FAST-DIVQ-NEXT: idivq %rsi
; FAST-DIVQ-NEXT: addq %rdx, %rax
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: Test_get_quotient_and_remainder:
; SLOW-DIVQ-LABEL: sdiv_quotient_and_remainder:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
Expand All @@ -168,8 +172,8 @@ define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
ret i64 %result
}

define i64 @Test_get_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: Test_get_quotient_and_remainder_optsize:
define i64 @sdiv_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: sdiv_quotient_and_remainder_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -182,8 +186,8 @@ define i64 @Test_get_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind opt
ret i64 %result
}

define i64 @Test_get_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: Test_get_quotient_and_remainder_minsize:
define i64 @sdiv_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: sdiv_quotient_and_remainder_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
Expand All @@ -196,6 +200,179 @@ define i64 @Test_get_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind min
ret i64 %result
}

;
; UDIV
;

define i64 @udiv_quotient(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: udiv_quotient:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: xorl %edx, %edx
; FAST-DIVQ-NEXT: divq %rsi
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: udiv_quotient:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
; SLOW-DIVQ-NEXT: orq %rsi, %rcx
; SLOW-DIVQ-NEXT: shrq $32, %rcx
; SLOW-DIVQ-NEXT: je .LBB9_1
; SLOW-DIVQ-NEXT: # %bb.2:
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divq %rsi
; SLOW-DIVQ-NEXT: retq
; SLOW-DIVQ-NEXT: .LBB9_1:
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax killed $rax
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divl %esi
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
; SLOW-DIVQ-NEXT: retq
%result = udiv i64 %a, %b
ret i64 %result
}

define i64 @udiv_quotient_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: udiv_quotient_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: retq
%result = udiv i64 %a, %b
ret i64 %result
}

define i64 @udiv_quotient_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: udiv_quotient_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: retq
%result = udiv i64 %a, %b
ret i64 %result
}

define i64 @udiv_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: udiv_remainder:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: xorl %edx, %edx
; FAST-DIVQ-NEXT: divq %rsi
; FAST-DIVQ-NEXT: movq %rdx, %rax
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: udiv_remainder:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
; SLOW-DIVQ-NEXT: orq %rsi, %rcx
; SLOW-DIVQ-NEXT: shrq $32, %rcx
; SLOW-DIVQ-NEXT: je .LBB12_1
; SLOW-DIVQ-NEXT: # %bb.2:
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divq %rsi
; SLOW-DIVQ-NEXT: movq %rdx, %rax
; SLOW-DIVQ-NEXT: retq
; SLOW-DIVQ-NEXT: .LBB12_1:
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax killed $rax
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divl %esi
; SLOW-DIVQ-NEXT: movl %edx, %eax
; SLOW-DIVQ-NEXT: retq
%result = urem i64 %a, %b
ret i64 %result
}

define i64 @udiv_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: udiv_remainder_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: movq %rdx, %rax
; CHECK-NEXT: retq
%result = urem i64 %a, %b
ret i64 %result
}

define i64 @udiv_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: udiv_remainder_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: movq %rdx, %rax
; CHECK-NEXT: retq
%result = urem i64 %a, %b
ret i64 %result
}

define i64 @udiv_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; FAST-DIVQ-LABEL: udiv_quotient_and_remainder:
; FAST-DIVQ: # %bb.0:
; FAST-DIVQ-NEXT: movq %rdi, %rax
; FAST-DIVQ-NEXT: xorl %edx, %edx
; FAST-DIVQ-NEXT: divq %rsi
; FAST-DIVQ-NEXT: addq %rdx, %rax
; FAST-DIVQ-NEXT: retq
;
; SLOW-DIVQ-LABEL: udiv_quotient_and_remainder:
; SLOW-DIVQ: # %bb.0:
; SLOW-DIVQ-NEXT: movq %rdi, %rax
; SLOW-DIVQ-NEXT: movq %rdi, %rcx
; SLOW-DIVQ-NEXT: orq %rsi, %rcx
; SLOW-DIVQ-NEXT: shrq $32, %rcx
; SLOW-DIVQ-NEXT: je .LBB15_1
; SLOW-DIVQ-NEXT: # %bb.2:
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divq %rsi
; SLOW-DIVQ-NEXT: addq %rdx, %rax
; SLOW-DIVQ-NEXT: retq
; SLOW-DIVQ-NEXT: .LBB15_1:
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax killed $rax
; SLOW-DIVQ-NEXT: xorl %edx, %edx
; SLOW-DIVQ-NEXT: divl %esi
; SLOW-DIVQ-NEXT: # kill: def $edx killed $edx def $rdx
; SLOW-DIVQ-NEXT: # kill: def $eax killed $eax def $rax
; SLOW-DIVQ-NEXT: addq %rdx, %rax
; SLOW-DIVQ-NEXT: retq
%resultdiv = udiv i64 %a, %b
%resultrem = urem i64 %a, %b
%result = add i64 %resultdiv, %resultrem
ret i64 %result
}

define i64 @udiv_quotient_and_remainder_optsize(i64 %a, i64 %b) nounwind optsize {
; CHECK-LABEL: udiv_quotient_and_remainder_optsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: retq
%resultdiv = udiv i64 %a, %b
%resultrem = urem i64 %a, %b
%result = add i64 %resultdiv, %resultrem
ret i64 %result
}

define i64 @udiv_quotient_and_remainder_minsize(i64 %a, i64 %b) nounwind minsize {
; CHECK-LABEL: udiv_quotient_and_remainder_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divq %rsi
; CHECK-NEXT: addq %rdx, %rax
; CHECK-NEXT: retq
%resultdiv = udiv i64 %a, %b
%resultrem = urem i64 %a, %b
%result = add i64 %resultdiv, %resultrem
ret i64 %result
}

define void @PR43514(i32 %x, i32 %y) {
; CHECK-LABEL: PR43514:
; CHECK: # %bb.0:
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