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ELF/AMDGPU: Add support for R_AMDGPU_REL32 relocations
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Reviewers: rafael, ruiu

Subscribers: kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21294

llvm-svn: 273192
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tstellarAMD committed Jun 20, 2016
1 parent 143f083 commit 1cfb9ef
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Showing 2 changed files with 23 additions and 6 deletions.
11 changes: 5 additions & 6 deletions lld/ELF/Target.cpp
Expand Up @@ -1405,17 +1405,16 @@ void AArch64TargetInfo::relaxTlsIeToLe(uint8_t *Loc, uint32_t Type,
llvm_unreachable("invalid relocation for TLS IE to LE relaxation");
}

// Implementing relocations for AMDGPU is low priority since most
// programs don't use relocations now. Thus, this function is not
// actually called (relocateOne is called for each relocation).
// That's why the AMDGPU port works without implementing this function.
void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
uint64_t Val) const {
llvm_unreachable("not implemented");
assert(Type == R_AMDGPU_REL32);
write32le(Loc, Val);
}

RelExpr AMDGPUTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
llvm_unreachable("not implemented");
if (Type != R_AMDGPU_REL32)
error("do not know how to handle relocation");
return R_PC;
}

ARMTargetInfo::ARMTargetInfo() {
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18 changes: 18 additions & 0 deletions lld/test/ELF/amdgpu-relocs.s
@@ -0,0 +1,18 @@
# RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %s -o %t.o
# RUN: ld.lld -shared %t.o -o %t.so
# RUN: llvm-readobj -r %t.so | FileCheck %s

# REQUIRES: amdgpu

# Make sure that the reloc for local_var is resolved by lld.

.text

kernel0:
s_mov_b32 s0, local_var+4
s_endpgm

.local local_var

# CHECK: Relocations [
# CHECK-NEXT: ]

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